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From: "Diederik de Haas" To: "Joachim Eastwood" , "Rob Herring" , "Krzysztof Kozlowski" , "Conor Dooley" , "Heiko Stuebner" Cc: , , , , Subject: Re: [PATCH v3 03/12] arm64: dts: rockchip: rk3588s-nanopi-r6: fix missing pcie rst pinctrl References: <20260713-nanopi-m6-v3-0-227567ffc5dc@gmail.com> <20260713-nanopi-m6-v3-3-227567ffc5dc@gmail.com> In-Reply-To: <20260713-nanopi-m6-v3-3-227567ffc5dc@gmail.com> X-Migadu-Flow: FLOW_OUT X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260714_060305_725005_1CF629E4 X-CRM114-Status: GOOD ( 12.45 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Joachim, On Mon Jul 13, 2026 at 10:30 PM CEST, Joachim Eastwood via B4 Relay wrote: > From: Joachim Eastwood > > The pins are used as reset-gpios but not reserved through pinctrl. > > Fixes: f3c6526d6fb2 ("arm64: dts: rockchip: Convert dts files used as par= ents to dtsi files") > Signed-off-by: Joachim Eastwood > --- > arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi | 14 ++++++++++++++ > 1 file changed, 14 insertions(+) > > diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi b/arch/a= rm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi > index 67e284a15c35..8df6e1a21180 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi > +++ b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi > @@ -360,12 +360,16 @@ rgmii_phy1: ethernet-phy@1 { > }; > =20 > &pcie2x1l1 { > + pinctrl-names =3D "default"; > + pinctrl-0 =3D <&pcie2_1_rst>; > reset-gpios =3D <&gpio1 RK_PA7 GPIO_ACTIVE_HIGH>; > vpcie3v3-supply =3D <&vcc_3v3_pcie20>; > status =3D "okay"; > }; > =20 > &pcie2x1l2 { > + pinctrl-names =3D "default"; > + pinctrl-0 =3D <&pcie2_2_rst>; > reset-gpios =3D <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>; > vpcie3v3-supply =3D <&vcc_3v3_pcie20>; > status =3D "okay"; > @@ -420,6 +424,16 @@ rtc_int: rtc-int { > }; > }; > =20 > + pcie { > + pcie2_1_rst: pcie2-1-rst { ``pcie20x1_1_perstn_m2`` to match the schematic name? > + rockchip,pins =3D <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>; > + }; > + > + pcie2_2_rst: pcie2-2-rst { And ``pcie20x1_2_perstn_m0`` here? Cheers, Diederik > + rockchip,pins =3D <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; > + }; > + }; > + > sdmmc { > sdmmc_det_pin: sdmmc-det-pin { > rockchip,pins =3D <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;