From: "Michael Walle" <mwalle@kernel.org>
To: "Yu-Chun Lin [林祐君]" <eleanor.lin@realtek.com>,
"Andy Shevchenko" <andriy.shevchenko@intel.com>
Cc: "Michael.Hennerich@analog.com" <Michael.Hennerich@analog.com>,
"afaerber@suse.com" <afaerber@suse.com>,
"andy@kernel.org" <andy@kernel.org>,
"brgl@kernel.org" <brgl@kernel.org>,
"conor+dt@kernel.org" <conor+dt@kernel.org>,
"CY_Huang[黃鉦晏]" <cy.huang@realtek.com>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"dlechner@baylibre.com" <dlechner@baylibre.com>,
"James Tai [戴志峰]" <james.tai@realtek.com>,
"jic23@kernel.org" <jic23@kernel.org>,
"krzk+dt@kernel.org" <krzk+dt@kernel.org>,
"lars@metafoo.de" <lars@metafoo.de>,
"linus.walleij@linaro.org" <linus.walleij@linaro.org>,
"linusw@kernel.org" <linusw@kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"linux-gpio@vger.kernel.org" <linux-gpio@vger.kernel.org>,
"linux-iio@vger.kernel.org" <linux-iio@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-realtek-soc@lists.infradead.org"
<linux-realtek-soc@lists.infradead.org>,
"mathieu.dubois-briand@bootlin.com"
<mathieu.dubois-briand@bootlin.com>,
"nuno.sa@analog.com" <nuno.sa@analog.com>,
"robh@kernel.org" <robh@kernel.org>,
"Stanley Chang[昌育德]" <stanley_chang@realtek.com>,
"TY_Chang[張子逸]" <tychang@realtek.com>,
"wbg@kernel.org" <wbg@kernel.org>
Subject: Re: [PATCH v3 3/7] gpio: regmap: Add gpio_regmap_operation and write-enable support
Date: Thu, 16 Jul 2026 13:03:50 +0200 [thread overview]
Message-ID: <DJZY1YPMDLIN.3W0QOPEI9L8JA@kernel.org> (raw)
In-Reply-To: <9ee344c1d9c642bdb7d3b85bc922fe66@realtek.com>
Hi,
On Thu Jul 16, 2026 at 12:47 PM CEST, Yu-Chun Lin [林祐君] wrote:
> I checked with our internal hardware engineers. The WREN bit was designed to
> avoid race conditions, which requires both the data bit and the WREN bit to be
> updated simultaneously within the same register.
Your mail just arrived as I was writing my reply. So yeah, that's
basically what I was saying.
> I have a new idea that might be similar to Michael's suggestion.
If not almost exactly what I had in mind. :)
> We can
> introduce a new callback to allow the driver to intercept and modify the
> mask and the value. By doing so, the driver can determine the corresponding
> WREN bit based on the original mask, and assemble the WREN bit into this new
> callback function right before the final write API is executed.
>
> The idea looks like:
>
> static void gpio_regmap_set(struct gpio_chip *chip, unsigned int offset,
> int val)
> {
> struct gpio_regmap *gpio = gpiochip_get_data(chip);
> unsigned int base = gpio_regmap_addr(gpio->reg_set_base);
> unsigned int reg, mask, mask_val, wren_reg, wren_mask;
> int ret;
>
> ret = gpio->reg_mask_xlate(gpio, GPIO_REGMAP_SET_OP, base, offset, ®, &mask);
> if (ret)
> return;
>
> if (val)
> mask_val = mask;
> else
> mask_val = 0;
>
> /* Let the driver modify the mask and mask_val to include WREN */
> if (gpio->value_xlate) {
> ret = gpio->value_xlate(&mask, &mask_val);
Yeah, but you probably also have to pass gpio :) And at this point
I'd call it value not mask_val anymore. And the signature should
probably looks somthing like:
int (*value_xlate)(struct gpio_chip *chip, enum gpio_regmap_op
op, unsigned int offset, unsigned int reg, unsigned int mask,
unsigned int *value)
mask shouldn't need to be a pointer as you don't have to modify it,
do you? reg_mask_xlate, already does that.
-michael
> if (ret)
> return ret;
> }
>
> /* ignore input values which shadow the old output value */
> if (gpio->reg_dat_base == gpio->reg_set_base)
> ret = regmap_write_bits(gpio->regmap, reg, mask, mask_val);
> else
> ret = regmap_update_bits(gpio->regmap, reg, mask, mask_val);
>
> return ret;
> }
>
> Best Regards,
> Yu-Chun
next prev parent reply other threads:[~2026-07-16 11:04 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-12 3:33 [PATCH v3 0/7] gpio: realtek: Add support for Realtek DHC RTD1625 Yu-Chun Lin
2026-05-12 3:33 ` [PATCH v3 1/7] gpio: Replace "default y" with "default ARCH_REALTEK" in Kconfig Yu-Chun Lin
2026-05-12 3:33 ` [PATCH v3 2/7] gpio: regmap: add gpio_regmap_get_gpiochip() accessor Yu-Chun Lin
2026-05-12 11:20 ` Andy Shevchenko
2026-05-25 12:04 ` Yu-Chun Lin [林祐君]
2026-06-03 0:34 ` Andy Shevchenko
2026-06-08 14:10 ` Bartosz Golaszewski
2026-06-08 14:41 ` Michael Walle
2026-06-17 8:36 ` Yu-Chun Lin [林祐君]
2026-06-17 8:44 ` Michael Walle
2026-06-17 9:54 ` Yu-Chun Lin [林祐君]
2026-06-17 11:19 ` Michael Walle
2026-06-19 21:08 ` Linus Walleij
2026-06-22 10:35 ` Andy Shevchenko
2026-06-30 13:21 ` Linus Walleij
2026-07-01 8:44 ` Michael Walle
2026-07-01 10:01 ` Andy Shevchenko
2026-07-01 10:55 ` Andy Shevchenko
2026-07-01 11:38 ` Andy Shevchenko
2026-07-01 11:42 ` Michael Walle
2026-07-01 12:03 ` Andy Shevchenko
2026-07-01 11:38 ` Michael Walle
2026-07-01 12:08 ` Andy Shevchenko
2026-05-12 3:33 ` [PATCH v3 3/7] gpio: regmap: Add gpio_regmap_operation and write-enable support Yu-Chun Lin
2026-05-12 11:26 ` Andy Shevchenko
2026-05-12 14:37 ` Jonathan Cameron
2026-07-09 17:21 ` Yu-Chun Lin [林祐君]
2026-07-16 6:26 ` Yu-Chun Lin
2026-07-16 7:15 ` Michael Walle
2026-07-16 8:27 ` Andy Shevchenko
2026-07-16 9:08 ` Michael Walle
2026-07-16 9:40 ` Andy Shevchenko
2026-07-16 10:47 ` Yu-Chun Lin [林祐君]
2026-07-16 11:03 ` Michael Walle [this message]
2026-07-16 11:21 ` Yu-Chun Lin [林祐君]
[not found] ` <DJZYVQSJL0MO.143E5QFQRAXVV@kernel.org>
2026-07-16 12:08 ` Yu-Chun Lin [林祐君]
2026-07-16 10:55 ` Michael Walle
2026-05-13 7:40 ` Linus Walleij
2026-05-12 3:33 ` [PATCH v3 4/7] gpio: regmap: Add set_config callback Yu-Chun Lin
2026-05-12 18:12 ` Andy Shevchenko
2026-05-12 3:33 ` [PATCH v3 5/7] dt-bindings: gpio: realtek: Add realtek,rtd1625-gpio Yu-Chun Lin
2026-05-12 3:33 ` [PATCH v3 6/7] gpio: realtek: Add driver for Realtek DHC RTD1625 SoC Yu-Chun Lin
2026-05-12 18:50 ` Andy Shevchenko
2026-05-12 3:33 ` [PATCH v3 7/7] arm64: dts: realtek: Add GPIO support for RTD1625 Yu-Chun Lin
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