From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id ECE0CC5CFC1 for ; Fri, 14 Aug 2026 09:52:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:In-Reply-To:References: Subject:To:From:Cc:Message-Id:Date:Content-Type:Mime-Version:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=ZjEgGR5UyWYuC7bo2ZSqxrX75AbIZW8r7AMwacJ8Gpg=; b=QgqGWQ7Elx68QlOvY6FcanDozQ ZSP2Ijf/yDYSLf8kxS4iWpBxH6t7BimmhFEzkIqEIoI7OXZPYbt3FEUZY56lf4C9UF8OH6tsNPnPi xUmy6miN21JBu9jtNhqx7Aksr+Zfav9wQX5dwMxk4Vbcwi4tucF9+vmTEzmEplWdBdp40Xt5nkeeC D0QAU2DEYTuRcSWEHZTN6h40y9KypmlBjnwV3z+2IeKwY4dKJwN+VbdruLdIgQzEZ/bRHc3GKQ7S4 oCkZXKUXiJqzWYaVfglv+Xa+bYCTZWMgSw5xmbSr5NBj2qGY3By0LTqgPcaBJtIcBDaPmrzd8trzP Zzw0D19g==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.99.1 #2 (Red Hat Linux)) id 1wuoaA-00000002STY-1XqK; Fri, 14 Aug 2026 09:52:10 +0000 Received: from tor.source.kernel.org ([172.105.4.254]) by bombadil.infradead.org with esmtps (Exim 4.99.1 #2 (Red Hat Linux)) id 1wuoa8-00000002SSS-1GG1; Fri, 14 Aug 2026 09:52:08 +0000 Received: from smtp.kernel.org (quasi.space.kernel.org [100.103.45.18]) by tor.source.kernel.org (Postfix) with UTF8SMTP id BB97D601DE; Fri, 14 Aug 2026 09:52:07 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with UTF8SMTPSA id E55931F000E9; Fri, 14 Aug 2026 09:52:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1786701127; bh=ZjEgGR5UyWYuC7bo2ZSqxrX75AbIZW8r7AMwacJ8Gpg=; h=Date:Cc:From:To:Subject:References:In-Reply-To; b=bZlWQFvd5K5vEmjVtWpPPlAdDSghRgoIDySJsrGGMrOTzGQRKBRtoeY41MsOuRwC0 0zwT47TwJcQlmI1mZxjX3ebrura5kVDYzGKW3vpXbzd4OH4au269l4x0pto7o+FpSp wWcPwPmybTx+N8vyMVLfVNxep2vIwHaNUilEAnkqu92nAu1NS6NSBN0vrnuRWpViwi NhdSmb2BhyBPwvECbXvO6hhF6ICwiSKEdivSuxWqzNQdJMsgCTSMmvPouLDAvLfSVa puR1VyGb6Zv7lLECCqaVjp7Cl6jopHXmakScbP02hYMSkk81RqA30WdolAhMkIx+FQ Ma6RrwmdI/N6Q== Mime-Version: 1.0 Content-Type: multipart/signed; boundary=ffffe9e9efb85a61a6bb44b1ced817c7a224b86fc079b57f44b3b3f0bf3a; micalg=pgp-sha384; protocol="application/pgp-signature" Date: Fri, 14 Aug 2026 11:52:03 +0200 Message-Id: Cc: "Steam Lin" , "Hsin-Yi Wang" , "Thomas Petazzoni" , , , , From: "Michael Walle" To: "Miquel Raynal" , "Pratyush Yadav" , "Takahiro Kuwano" , "Richard Weinberger" , "Vignesh Raghavendra" , "Nicolas Ferre" , "Alexandre Belloni" , "Claudiu Beznea" , "Jonathan Corbet" , "Shuah Khan" Subject: Re: [PATCH v3 19/23] mtd: spi-nor: winbond: Add support for W25Q51RV-M X-Mailer: aerc 0.20.0 References: <20260813-winbond-v7-1-spi-nor-rv-addition-v3-0-b637cf120d5c@bootlin.com> <20260813-winbond-v7-1-spi-nor-rv-addition-v3-19-b637cf120d5c@bootlin.com> In-Reply-To: <20260813-winbond-v7-1-spi-nor-rv-addition-v3-19-b637cf120d5c@bootlin.com> X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org --ffffe9e9efb85a61a6bb44b1ced817c7a224b86fc079b57f44b3b3f0bf3a Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=UTF-8 On Thu Aug 13, 2026 at 5:19 PM CEST, Miquel Raynal wrote: > There is an ID collision with the chip of same density from the JV > family. Both chips are very similar in practice, it is mostly a matter > of electrical differences (mostly power consumption being lower). > > As a significant difference, RV chips identify themselves as supporting > the new SFDP (rev F) field which forces an alternate write SR2 > opcode (0x31). > > Signed-off-by: Miquel Raynal Reviewed-by: Michael Walle --ffffe9e9efb85a61a6bb44b1ced817c7a224b86fc079b57f44b3b3f0bf3a Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iKgEABMJADAWIQTIVZIcOo5wfU/AngkSJzzuPgIf+AUCan7lRBIcbXdhbGxlQGtl cm5lbC5vcmcACgkQEic87j4CH/hexwF/Xjzb2Rja1m6yDd62MiqWfltIjUxRULdZ Rn9z7fjBCRh3U+RLj4qPsOUfbmpdqXr9AYDVlUFEVq3Czdq3DVTVZ391yNcpj7EQ vL+LDChqzbbiJhSq+QjO0rzyb5EAIgs65oM= =PwCl -----END PGP SIGNATURE----- --ffffe9e9efb85a61a6bb44b1ced817c7a224b86fc079b57f44b3b3f0bf3a--