From: linux@arm.linux.org.uk (Russell King - ARM Linux)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/5] ARM: GIC: Remove MMIO address from gic_cpu_init, rename to gic_secondary_init
Date: Sun, 05 Dec 2010 11:34:38 +0000 [thread overview]
Message-ID: <E1PPCrW-0004xS-L5@rmk-PC.arm.linux.org.uk> (raw)
In-Reply-To: <20101205113311.GC9138@n2100.arm.linux.org.uk>
We don't need to re-pass the base address for the CPU interfaces to the
GIC for secondary CPUs, as it will never be different from the boot CPU
- and even if it was, we'd overwrite the boot CPU's base address.
Get rid of this argument, and rename to gic_secondary_init().
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
---
arch/arm/common/gic.c | 7 ++++++-
arch/arm/include/asm/hardware/gic.h | 2 +-
arch/arm/mach-omap2/omap-smp.c | 2 +-
arch/arm/mach-realview/platsmp.c | 2 +-
arch/arm/mach-s5pv310/platsmp.c | 2 +-
arch/arm/mach-tegra/platsmp.c | 2 +-
arch/arm/mach-ux500/platsmp.c | 2 +-
arch/arm/mach-vexpress/platsmp.c | 2 +-
8 files changed, 13 insertions(+), 8 deletions(-)
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
index 41dce4f..12b6a08 100644
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@ -276,7 +276,7 @@ static void __init gic_dist_init(unsigned int gic_nr, void __iomem *base,
writel(1, base + GIC_DIST_CTRL);
}
-void __cpuinit gic_cpu_init(unsigned int gic_nr, void __iomem *base)
+static void __cpuinit gic_cpu_init(unsigned int gic_nr, void __iomem *base)
{
void __iomem *dist_base;
int i;
@@ -313,6 +313,11 @@ void __init gic_init(unsigned int gic_nr, unsigned int irq_start,
gic_cpu_init(gic_nr, cpu_base);
}
+void __cpuinit gic_secondary_init(unsigned int gic_nr)
+{
+ gic_cpu_init(gic_nr, gic_data[gic_nr].cpu_base);
+}
+
#ifdef CONFIG_SMP
void gic_raise_softirq(const struct cpumask *mask, unsigned int irq)
{
diff --git a/arch/arm/include/asm/hardware/gic.h b/arch/arm/include/asm/hardware/gic.h
index 387c6ae..48876a3 100644
--- a/arch/arm/include/asm/hardware/gic.h
+++ b/arch/arm/include/asm/hardware/gic.h
@@ -33,8 +33,8 @@
#define GIC_DIST_SOFTINT 0xf00
#ifndef __ASSEMBLY__
-void gic_cpu_init(unsigned int gic_nr, void __iomem *base);
void gic_init(unsigned int, unsigned int, void __iomem *, void __iomem *);
+void gic_secondary_init(unsigned int);
void gic_cascade_irq(unsigned int gic_nr, unsigned int irq);
void gic_raise_softirq(const struct cpumask *mask, unsigned int irq);
#endif
diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c
index 9e9f70e..9fbac2c 100644
--- a/arch/arm/mach-omap2/omap-smp.c
+++ b/arch/arm/mach-omap2/omap-smp.c
@@ -50,7 +50,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
* core (e.g. timer irq), then they will not have been enabled
* for us: do so
*/
- gic_cpu_init(0, gic_cpu_base_addr);
+ gic_secondary_init(0);
/*
* Synchronise with the boot thread.
diff --git a/arch/arm/mach-realview/platsmp.c b/arch/arm/mach-realview/platsmp.c
index 0092658..6da8a2e 100644
--- a/arch/arm/mach-realview/platsmp.c
+++ b/arch/arm/mach-realview/platsmp.c
@@ -69,7 +69,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
* core (e.g. timer irq), then they will not have been enabled
* for us: do so
*/
- gic_cpu_init(0, gic_cpu_base_addr);
+ gic_secondary_init(0);
/*
* let the primary processor know we're out of the
diff --git a/arch/arm/mach-s5pv310/platsmp.c b/arch/arm/mach-s5pv310/platsmp.c
index d357c19..15929c1 100644
--- a/arch/arm/mach-s5pv310/platsmp.c
+++ b/arch/arm/mach-s5pv310/platsmp.c
@@ -54,7 +54,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
* core (e.g. timer irq), then they will not have been enabled
* for us: do so
*/
- gic_cpu_init(0, gic_cpu_base_addr);
+ gic_secondary_init(0);
/*
* let the primary processor know we're out of the
diff --git a/arch/arm/mach-tegra/platsmp.c b/arch/arm/mach-tegra/platsmp.c
index 1c0fd92..3b7376c 100644
--- a/arch/arm/mach-tegra/platsmp.c
+++ b/arch/arm/mach-tegra/platsmp.c
@@ -48,7 +48,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
* core (e.g. timer irq), then they will not have been enabled
* for us: do so
*/
- gic_cpu_init(0, IO_ADDRESS(TEGRA_ARM_PERIF_BASE) + 0x100);
+ gic_secondary_init(0);
/*
* Synchronise with the boot thread.
diff --git a/arch/arm/mach-ux500/platsmp.c b/arch/arm/mach-ux500/platsmp.c
index 9e4c678..b5077b4 100644
--- a/arch/arm/mach-ux500/platsmp.c
+++ b/arch/arm/mach-ux500/platsmp.c
@@ -44,7 +44,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
* core (e.g. timer irq), then they will not have been enabled
* for us: do so
*/
- gic_cpu_init(0, __io_address(UX500_GIC_CPU_BASE));
+ gic_secondary_init(0);
/*
* let the primary processor know we're out of the
diff --git a/arch/arm/mach-vexpress/platsmp.c b/arch/arm/mach-vexpress/platsmp.c
index 6709706..dfb5910 100644
--- a/arch/arm/mach-vexpress/platsmp.c
+++ b/arch/arm/mach-vexpress/platsmp.c
@@ -51,7 +51,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
* core (e.g. timer irq), then they will not have been enabled
* for us: do so
*/
- gic_cpu_init(0, gic_cpu_base_addr);
+ gic_secondary_init(0);
/*
* let the primary processor know we're out of the
--
1.6.2.5
next prev parent reply other threads:[~2010-12-05 11:34 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-12-05 11:33 [PATCH 0/5] ARM: GIC: cleanup Russell King - ARM Linux
2010-12-05 11:34 ` [PATCH 1/5] ARM: GIC: provide a single initialization function for boot CPU Russell King - ARM Linux
2010-12-05 21:45 ` Catalin Marinas
2010-12-05 11:34 ` Russell King - ARM Linux [this message]
2010-12-05 21:47 ` [PATCH 2/5] ARM: GIC: Remove MMIO address from gic_cpu_init, rename to gic_secondary_init Catalin Marinas
2010-12-05 11:34 ` [PATCH 3/5] ARM: GIC: consolidate gic_cpu_base_addr to common GIC code Russell King - ARM Linux
2010-12-05 22:01 ` Catalin Marinas
2010-12-05 11:35 ` [PATCH 4/5] ARM: GIC: move gic_data[] initialization into gic_init() Russell King - ARM Linux
2010-12-05 22:04 ` Catalin Marinas
2010-12-05 11:35 ` [PATCH 5/5] ARM: GIC: private a standard get_irqnr_preamble assembler macro Russell King - ARM Linux
2010-12-05 22:07 ` Catalin Marinas
2010-12-13 17:23 ` [PATCH 0/5] ARM: GIC: cleanup Abhijeet Dharmapurikar
2010-12-13 17:31 ` Russell King - ARM Linux
2010-12-14 18:11 ` Abhijeet Dharmapurikar
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