From: linux@arm.linux.org.uk (Russell King - ARM Linux)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 5/5] ARM: GIC: private a standard get_irqnr_preamble assembler macro
Date: Sun, 05 Dec 2010 11:35:39 +0000 [thread overview]
Message-ID: <E1PPCsV-0004xe-Ua@rmk-PC.arm.linux.org.uk> (raw)
In-Reply-To: <20101205113311.GC9138@n2100.arm.linux.org.uk>
Provide a standard get_irqnr_preamble assembler macro for platforms
to use, which retrieves the base address of the GIC CPU interface
from gic_cpu_base_addr. Allow platforms to override this by defining
HAVE_GET_IRQNR_PREAMBLE.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
---
arch/arm/include/asm/hardware/entry-macro-gic.S | 7 +++++++
arch/arm/mach-cns3xxx/include/mach/entry-macro.S | 5 -----
arch/arm/mach-omap2/include/mach/entry-macro.S | 1 +
arch/arm/mach-realview/include/mach/entry-macro.S | 5 -----
arch/arm/mach-tegra/include/mach/entry-macro.S | 2 +-
arch/arm/mach-ux500/include/mach/entry-macro.S | 1 +
arch/arm/mach-vexpress/include/mach/entry-macro.S | 5 -----
7 files changed, 10 insertions(+), 16 deletions(-)
diff --git a/arch/arm/include/asm/hardware/entry-macro-gic.S b/arch/arm/include/asm/hardware/entry-macro-gic.S
index 05587f1..c115b82 100644
--- a/arch/arm/include/asm/hardware/entry-macro-gic.S
+++ b/arch/arm/include/asm/hardware/entry-macro-gic.S
@@ -10,6 +10,13 @@
#include <asm/hardware/gic.h>
+#ifndef HAVE_GET_IRQNR_PREAMBLE
+ .macro get_irqnr_preamble, base, tmp
+ ldr \base, =gic_cpu_base_addr
+ ldr \base, [\base]
+ .endm
+#endif
+
/*
* The interrupt numbering scheme is defined in the
* interrupt controller spec. To wit:
diff --git a/arch/arm/mach-cns3xxx/include/mach/entry-macro.S b/arch/arm/mach-cns3xxx/include/mach/entry-macro.S
index e793c33..6bd83ed 100644
--- a/arch/arm/mach-cns3xxx/include/mach/entry-macro.S
+++ b/arch/arm/mach-cns3xxx/include/mach/entry-macro.S
@@ -14,10 +14,5 @@
.macro disable_fiq
.endm
- .macro get_irqnr_preamble, base, tmp
- ldr \base, =gic_cpu_base_addr
- ldr \base, [\base]
- .endm
-
.macro arch_ret_to_user, tmp1, tmp2
.endm
diff --git a/arch/arm/mach-omap2/include/mach/entry-macro.S b/arch/arm/mach-omap2/include/mach/entry-macro.S
index 2e358df..d54c4f8 100644
--- a/arch/arm/mach-omap2/include/mach/entry-macro.S
+++ b/arch/arm/mach-omap2/include/mach/entry-macro.S
@@ -170,6 +170,7 @@ omap_irq_base: .word 0
#ifdef CONFIG_ARCH_OMAP4
+#define HAVE_GET_IRQNR_PREAMBLE
#include <asm/hardware/entry-macro-gic.S>
.macro get_irqnr_preamble, base, tmp
diff --git a/arch/arm/mach-realview/include/mach/entry-macro.S b/arch/arm/mach-realview/include/mach/entry-macro.S
index 4417b10..4071164 100644
--- a/arch/arm/mach-realview/include/mach/entry-macro.S
+++ b/arch/arm/mach-realview/include/mach/entry-macro.S
@@ -13,11 +13,6 @@
.macro disable_fiq
.endm
- .macro get_irqnr_preamble, base, tmp
- ldr \base, =gic_cpu_base_addr
- ldr \base, [\base]
- .endm
-
.macro arch_ret_to_user, tmp1, tmp2
.endm
diff --git a/arch/arm/mach-tegra/include/mach/entry-macro.S b/arch/arm/mach-tegra/include/mach/entry-macro.S
index dc09249..dd165c5 100644
--- a/arch/arm/mach-tegra/include/mach/entry-macro.S
+++ b/arch/arm/mach-tegra/include/mach/entry-macro.S
@@ -16,7 +16,7 @@
#include <mach/io.h>
#if defined(CONFIG_ARM_GIC)
-
+#define HAVE_GET_IRQNR_PREAMBLE
#include <asm/hardware/entry-macro-gic.S>
/* Uses the GIC interrupt controller built into the cpu */
diff --git a/arch/arm/mach-ux500/include/mach/entry-macro.S b/arch/arm/mach-ux500/include/mach/entry-macro.S
index 3cc3cdf..a37f585 100644
--- a/arch/arm/mach-ux500/include/mach/entry-macro.S
+++ b/arch/arm/mach-ux500/include/mach/entry-macro.S
@@ -11,6 +11,7 @@
* warranty of any kind, whether express or implied.
*/
#include <mach/hardware.h>
+#define HAVE_GET_IRQNR_PREAMBLE
#include <asm/hardware/entry-macro-gic.S>
.macro disable_fiq
diff --git a/arch/arm/mach-vexpress/include/mach/entry-macro.S b/arch/arm/mach-vexpress/include/mach/entry-macro.S
index 19d5ac8..73c1129 100644
--- a/arch/arm/mach-vexpress/include/mach/entry-macro.S
+++ b/arch/arm/mach-vexpress/include/mach/entry-macro.S
@@ -3,10 +3,5 @@
.macro disable_fiq
.endm
- .macro get_irqnr_preamble, base, tmp
- ldr \base, =gic_cpu_base_addr
- ldr \base, [\base]
- .endm
-
.macro arch_ret_to_user, tmp1, tmp2
.endm
--
1.6.2.5
next prev parent reply other threads:[~2010-12-05 11:35 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-12-05 11:33 [PATCH 0/5] ARM: GIC: cleanup Russell King - ARM Linux
2010-12-05 11:34 ` [PATCH 1/5] ARM: GIC: provide a single initialization function for boot CPU Russell King - ARM Linux
2010-12-05 21:45 ` Catalin Marinas
2010-12-05 11:34 ` [PATCH 2/5] ARM: GIC: Remove MMIO address from gic_cpu_init, rename to gic_secondary_init Russell King - ARM Linux
2010-12-05 21:47 ` Catalin Marinas
2010-12-05 11:34 ` [PATCH 3/5] ARM: GIC: consolidate gic_cpu_base_addr to common GIC code Russell King - ARM Linux
2010-12-05 22:01 ` Catalin Marinas
2010-12-05 11:35 ` [PATCH 4/5] ARM: GIC: move gic_data[] initialization into gic_init() Russell King - ARM Linux
2010-12-05 22:04 ` Catalin Marinas
2010-12-05 11:35 ` Russell King - ARM Linux [this message]
2010-12-05 22:07 ` [PATCH 5/5] ARM: GIC: private a standard get_irqnr_preamble assembler macro Catalin Marinas
2010-12-13 17:23 ` [PATCH 0/5] ARM: GIC: cleanup Abhijeet Dharmapurikar
2010-12-13 17:31 ` Russell King - ARM Linux
2010-12-14 18:11 ` Abhijeet Dharmapurikar
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=E1PPCsV-0004xe-Ua@rmk-PC.arm.linux.org.uk \
--to=linux@arm.linux.org.uk \
--cc=linux-arm-kernel@lists.infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).