From: linux@arm.linux.org.uk (Russell King - ARM Linux)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 02/25] ARM: pm: arrange for cpu_proc_init() to be called on resume
Date: Thu, 23 Jun 2011 20:09:42 +0100 [thread overview]
Message-ID: <E1QZpHa-0005lk-Kn@rmk-PC.arm.linux.org.uk> (raw)
In-Reply-To: <20110623190900.GH9449@n2100.arm.linux.org.uk>
cpu_proc_init() does processor specific initialization, which we do
at boot time. We have been omitting to do this on resume, which
causes some of this initialization to be skipped. We've also been
skipping this on SMP initialization too.
Ensure that cpu_proc_init() is always called appropriately by
moving it into cpu_init(), and move cpu_init() to a more appropriate
point in the boot initialization.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
---
arch/arm/kernel/setup.c | 99 +++++++++++++++++++++++----------------------
arch/arm/mm/proc-sa1100.S | 4 +-
2 files changed, 51 insertions(+), 52 deletions(-)
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index ed11fb0..edcab02 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -342,54 +342,6 @@ static void __init feat_v6_fixup(void)
elf_hwcap &= ~HWCAP_TLS;
}
-static void __init setup_processor(void)
-{
- struct proc_info_list *list;
-
- /*
- * locate processor in the list of supported processor
- * types. The linker builds this table for us from the
- * entries in arch/arm/mm/proc-*.S
- */
- list = lookup_processor_type(read_cpuid_id());
- if (!list) {
- printk("CPU configuration botched (ID %08x), unable "
- "to continue.\n", read_cpuid_id());
- while (1);
- }
-
- cpu_name = list->cpu_name;
-
-#ifdef MULTI_CPU
- processor = *list->proc;
-#endif
-#ifdef MULTI_TLB
- cpu_tlb = *list->tlb;
-#endif
-#ifdef MULTI_USER
- cpu_user = *list->user;
-#endif
-#ifdef MULTI_CACHE
- cpu_cache = *list->cache;
-#endif
-
- printk("CPU: %s [%08x] revision %d (ARMv%s), cr=%08lx\n",
- cpu_name, read_cpuid_id(), read_cpuid_id() & 15,
- proc_arch[cpu_architecture()], cr_alignment);
-
- sprintf(init_utsname()->machine, "%s%c", list->arch_name, ENDIANNESS);
- sprintf(elf_platform, "%s%c", list->elf_name, ENDIANNESS);
- elf_hwcap = list->elf_hwcap;
-#ifndef CONFIG_ARM_THUMB
- elf_hwcap &= ~HWCAP_THUMB;
-#endif
-
- feat_v6_fixup();
-
- cacheid_init();
- cpu_proc_init();
-}
-
/*
* cpu_init - initialise one CPU.
*
@@ -405,6 +357,8 @@ void cpu_init(void)
BUG();
}
+ cpu_proc_init();
+
/*
* Define the placement constraint for the inline asm directive below.
* In Thumb-2, msr with an immediate value is not allowed.
@@ -441,6 +395,54 @@ void cpu_init(void)
: "r14");
}
+static void __init setup_processor(void)
+{
+ struct proc_info_list *list;
+
+ /*
+ * locate processor in the list of supported processor
+ * types. The linker builds this table for us from the
+ * entries in arch/arm/mm/proc-*.S
+ */
+ list = lookup_processor_type(read_cpuid_id());
+ if (!list) {
+ printk("CPU configuration botched (ID %08x), unable "
+ "to continue.\n", read_cpuid_id());
+ while (1);
+ }
+
+ cpu_name = list->cpu_name;
+
+#ifdef MULTI_CPU
+ processor = *list->proc;
+#endif
+#ifdef MULTI_TLB
+ cpu_tlb = *list->tlb;
+#endif
+#ifdef MULTI_USER
+ cpu_user = *list->user;
+#endif
+#ifdef MULTI_CACHE
+ cpu_cache = *list->cache;
+#endif
+
+ printk("CPU: %s [%08x] revision %d (ARMv%s), cr=%08lx\n",
+ cpu_name, read_cpuid_id(), read_cpuid_id() & 15,
+ proc_arch[cpu_architecture()], cr_alignment);
+
+ sprintf(init_utsname()->machine, "%s%c", list->arch_name, ENDIANNESS);
+ sprintf(elf_platform, "%s%c", list->elf_name, ENDIANNESS);
+ elf_hwcap = list->elf_hwcap;
+#ifndef CONFIG_ARM_THUMB
+ elf_hwcap &= ~HWCAP_THUMB;
+#endif
+
+ feat_v6_fixup();
+
+ cacheid_init();
+ cpu_init();
+}
+
void __init dump_machine_table(void)
{
struct machine_desc *p;
@@ -913,7 +915,6 @@ void __init setup_arch(char **cmdline_p)
#endif
reserve_crashkernel();
- cpu_init();
tcm_init();
#ifdef CONFIG_MULTI_IRQ_HANDLER
diff --git a/arch/arm/mm/proc-sa1100.S b/arch/arm/mm/proc-sa1100.S
index 184a9c9..e9c4727 100644
--- a/arch/arm/mm/proc-sa1100.S
+++ b/arch/arm/mm/proc-sa1100.S
@@ -34,7 +34,7 @@
*/
#define DCACHELINESIZE 32
- __INIT
+ .section .text
/*
* cpu_sa1100_proc_init()
@@ -45,8 +45,6 @@ ENTRY(cpu_sa1100_proc_init)
mcr p15, 0, r0, c9, c0, 5 @ Allow read-buffer operations from userland
mov pc, lr
- .section .text
-
/*
* cpu_sa1100_proc_fin()
*
--
1.7.4.4
next prev parent reply other threads:[~2011-06-23 19:09 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-06-23 19:09 [PATCH 00/25] Re-jig cpu_suspend for a saner calling convention Russell King - ARM Linux
2011-06-23 19:09 ` [PATCH 01/25] ARM: pm: ensure ARMv7 CPUs save and restore the TLS register Russell King - ARM Linux
2011-06-23 19:09 ` Russell King - ARM Linux [this message]
2011-06-23 19:10 ` [PATCH 03/25] ARM: pm: sa1100: no need to re-enable clock switching Russell King - ARM Linux
2011-06-23 19:10 ` [PATCH 04/25] ARM: pm: make MULTI_CPU and !MULTI_CPU resume paths the same Russell King - ARM Linux
2011-06-23 19:10 ` [PATCH 05/25] ARM: pm: move return address (for cpu_resume) to top of stack Russell King - ARM Linux
2011-06-23 19:11 ` [PATCH 06/25] ARM: pm: extract common code from MULTI_CPU/!MULTI_CPU paths Russell King - ARM Linux
2011-06-23 19:11 ` [PATCH 07/25] ARM: pm: preserve r4 - r11 across a suspend Russell King - ARM Linux
2011-06-23 19:11 ` [PATCH 08/25] ARM: pm: reallocate registers to avoid r2, r3 Russell King - ARM Linux
2011-06-23 19:12 ` [PATCH 09/25] ARM: pm: rejig suspend follow-on function calling convention Russell King - ARM Linux
2011-06-23 19:12 ` [PATCH 10/25] ARM: pm: move sa1100 to use proper suspend func arg0 Russell King - ARM Linux
2011-06-23 19:12 ` [PATCH 11/25] ARM: pm: convert cpu_suspend() to a normal function Russell King - ARM Linux
2011-06-23 19:13 ` [PATCH 12/25] ARM: pm: move cpu_init() call into core code Russell King - ARM Linux
2011-06-23 19:13 ` [PATCH 13/25] ARM: pm: sa1100: move cpu_suspend into C code Russell King - ARM Linux
2011-06-23 19:13 ` [PATCH 14/25] ARM: pm: plat-s3c24xx: cleanup s3c_cpu_save Russell King - ARM Linux
2011-06-24 6:48 ` Kukjin Kim
2011-06-23 19:14 ` [PATCH 15/25] ARM: pm: mach-s5pv210: " Russell King - ARM Linux
2011-06-23 19:14 ` [PATCH 16/25] ARM: pm: mach-exynos4: " Russell King - ARM Linux
2011-06-23 19:14 ` [PATCH 17/25] ARM: pm: mach-s3c64xx: " Russell King - ARM Linux
2011-06-23 19:15 ` [PATCH 18/25] ARM: pm: samsung: move cpu_suspend into C code Russell King - ARM Linux
2011-06-23 19:15 ` [PATCH 19/25] ARM: pm: samsung: no need to call flush_cache_all() Russell King - ARM Linux
2011-06-23 19:15 ` [PATCH 20/25] ARM: pm: pxa: move cpu_suspend into C code Russell King - ARM Linux
2011-06-23 19:16 ` [PATCH 21/25] ARM: pm: omap34xx: no need to save all registers in sleep34xx.S Russell King - ARM Linux
2011-06-23 19:16 ` [PATCH 22/25] ARM: pm: omap34xx: remove misleading comment and use of r9 Russell King - ARM Linux
2011-06-23 19:16 ` [PATCH 23/25] ARM: pm: omap34xx: convert to generic suspend/resume support Russell King - ARM Linux
2011-06-24 7:37 ` Jean Pihet
2011-06-24 7:42 ` Russell King - ARM Linux
2011-06-23 19:17 ` [PATCH 24/25] ARM: pm: hide 1st and 2nd arguments to cpu_suspend from platform code Russell King - ARM Linux
2011-06-23 21:27 ` Kevin Hilman
2011-06-23 19:17 ` [PATCH 25/25] ARM: pm: ensure our temporary page table entry is removed from the TLB Russell King - ARM Linux
2011-06-23 22:14 ` [PATCH 00/25] Re-jig cpu_suspend for a saner calling convention Kevin Hilman
2011-06-24 7:43 ` Jean Pihet
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