From: rmk+kernel@arm.linux.org.uk (Russell King)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 21/44] ARM: l2c: move and add ARM L2C-2x0/L2C-310 save/resume code to non-OF
Date: Mon, 17 Mar 2014 00:15:18 +0000 [thread overview]
Message-ID: <E1WPLD4-0002dG-6F@rmk-PC.arm.linux.org.uk> (raw)
In-Reply-To: <20140317001302.GY21483@n2100.arm.linux.org.uk>
Add the save/resume code hooks to the non-OF implementations as well.
There's no reason for the non-OF implementations to be any different
from the OF implementations.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
---
arch/arm/mm/cache-l2x0.c | 151 ++++++++++++++++++++++++-----------------------
1 file changed, 77 insertions(+), 74 deletions(-)
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index e6913bc67c34..e4e7dd4ab9b5 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -371,6 +371,21 @@ static void l2x0_enable(void __iomem *base, u32 aux)
writel_relaxed(L2X0_CTRL_EN, base + L2X0_CTRL);
}
+static void l2x0_resume(void)
+{
+ if (!(readl_relaxed(l2x0_base + L2X0_CTRL) & L2X0_CTRL_EN)) {
+ /* restore aux ctrl and enable l2 */
+ l2x0_unlock(readl_relaxed(l2x0_base + L2X0_CACHE_ID));
+
+ writel_relaxed(l2x0_saved_regs.aux_ctrl, l2x0_base +
+ L2X0_AUX_CTRL);
+
+ l2x0_inv_all();
+
+ writel_relaxed(L2X0_CTRL_EN, l2x0_base + L2X0_CTRL);
+ }
+}
+
static const struct l2c_init_data l2x0_init_fns __initconst = {
.enable = l2x0_enable,
.outer_cache = {
@@ -380,6 +395,7 @@ static const struct l2c_init_data l2x0_init_fns __initconst = {
.flush_all = l2x0_flush_all,
.disable = l2x0_disable,
.sync = l2x0_cache_sync,
+ .resume = l2x0_resume,
},
};
@@ -416,6 +432,65 @@ static void l2c310_enable(void __iomem *base, u32 aux)
l2c_enable(base, aux, 8);
}
+static void __init pl310_save(void __iomem *base)
+{
+ u32 l2x0_revision = readl_relaxed(base + L2X0_CACHE_ID) &
+ L2X0_CACHE_ID_RTL_MASK;
+
+ l2x0_saved_regs.tag_latency = readl_relaxed(base +
+ L2X0_TAG_LATENCY_CTRL);
+ l2x0_saved_regs.data_latency = readl_relaxed(base +
+ L2X0_DATA_LATENCY_CTRL);
+ l2x0_saved_regs.filter_end = readl_relaxed(base +
+ L2X0_ADDR_FILTER_END);
+ l2x0_saved_regs.filter_start = readl_relaxed(base +
+ L2X0_ADDR_FILTER_START);
+
+ if (l2x0_revision >= L310_CACHE_ID_RTL_R2P0) {
+ /*
+ * From r2p0, there is Prefetch offset/control register
+ */
+ l2x0_saved_regs.prefetch_ctrl = readl_relaxed(base +
+ L2X0_PREFETCH_CTRL);
+ /*
+ * From r3p0, there is Power control register
+ */
+ if (l2x0_revision >= L310_CACHE_ID_RTL_R3P0)
+ l2x0_saved_regs.pwr_ctrl = readl_relaxed(base +
+ L2X0_POWER_CTRL);
+ }
+}
+
+static void pl310_resume(void)
+{
+ u32 l2x0_revision;
+
+ if (!(readl_relaxed(l2x0_base + L2X0_CTRL) & L2X0_CTRL_EN)) {
+ /* restore pl310 setup */
+ writel_relaxed(l2x0_saved_regs.tag_latency,
+ l2x0_base + L2X0_TAG_LATENCY_CTRL);
+ writel_relaxed(l2x0_saved_regs.data_latency,
+ l2x0_base + L2X0_DATA_LATENCY_CTRL);
+ writel_relaxed(l2x0_saved_regs.filter_end,
+ l2x0_base + L2X0_ADDR_FILTER_END);
+ writel_relaxed(l2x0_saved_regs.filter_start,
+ l2x0_base + L2X0_ADDR_FILTER_START);
+
+ l2x0_revision = readl_relaxed(l2x0_base + L2X0_CACHE_ID) &
+ L2X0_CACHE_ID_RTL_MASK;
+
+ if (l2x0_revision >= L310_CACHE_ID_RTL_R2P0) {
+ writel_relaxed(l2x0_saved_regs.prefetch_ctrl,
+ l2x0_base + L2X0_PREFETCH_CTRL);
+ if (l2x0_revision >= L310_CACHE_ID_RTL_R3P0)
+ writel_relaxed(l2x0_saved_regs.pwr_ctrl,
+ l2x0_base + L2X0_POWER_CTRL);
+ }
+ }
+
+ l2x0_resume();
+}
+
static void __init l2c310_fixup(void __iomem *base, u32 cache_id,
struct outer_cache_fns *fns)
{
@@ -448,6 +523,7 @@ static void __init l2c310_fixup(void __iomem *base, u32 cache_id,
static const struct l2c_init_data l2c310_init_fns __initconst = {
.enable = l2c310_enable,
.fixup = l2c310_fixup,
+ .save = pl310_save,
.outer_cache = {
.inv_range = l2x0_inv_range,
.clean_range = l2x0_clean_range,
@@ -455,6 +531,7 @@ static const struct l2c_init_data l2c310_init_fns __initconst = {
.flush_all = l2x0_flush_all,
.disable = l2x0_disable,
.sync = l2x0_cache_sync,
+ .resume = pl310_resume,
},
};
@@ -607,21 +684,6 @@ static void __init l2x0_of_parse(const struct device_node *np,
*aux_mask &= ~mask;
}
-static void l2x0_resume(void)
-{
- if (!(readl_relaxed(l2x0_base + L2X0_CTRL) & L2X0_CTRL_EN)) {
- /* restore aux ctrl and enable l2 */
- l2x0_unlock(readl_relaxed(l2x0_base + L2X0_CACHE_ID));
-
- writel_relaxed(l2x0_saved_regs.aux_ctrl, l2x0_base +
- L2X0_AUX_CTRL);
-
- l2x0_inv_all();
-
- writel_relaxed(L2X0_CTRL_EN, l2x0_base + L2X0_CTRL);
- }
-}
-
static const struct l2c_init_data of_l2x0_data __initconst = {
.of_parse = l2x0_of_parse,
.enable = l2x0_enable,
@@ -670,65 +732,6 @@ static void __init pl310_of_parse(const struct device_node *np,
}
}
-static void __init pl310_save(void __iomem *base)
-{
- u32 l2x0_revision = readl_relaxed(base + L2X0_CACHE_ID) &
- L2X0_CACHE_ID_RTL_MASK;
-
- l2x0_saved_regs.tag_latency = readl_relaxed(base +
- L2X0_TAG_LATENCY_CTRL);
- l2x0_saved_regs.data_latency = readl_relaxed(base +
- L2X0_DATA_LATENCY_CTRL);
- l2x0_saved_regs.filter_end = readl_relaxed(base +
- L2X0_ADDR_FILTER_END);
- l2x0_saved_regs.filter_start = readl_relaxed(base +
- L2X0_ADDR_FILTER_START);
-
- if (l2x0_revision >= L310_CACHE_ID_RTL_R2P0) {
- /*
- * From r2p0, there is Prefetch offset/control register
- */
- l2x0_saved_regs.prefetch_ctrl = readl_relaxed(base +
- L2X0_PREFETCH_CTRL);
- /*
- * From r3p0, there is Power control register
- */
- if (l2x0_revision >= L310_CACHE_ID_RTL_R3P0)
- l2x0_saved_regs.pwr_ctrl = readl_relaxed(base +
- L2X0_POWER_CTRL);
- }
-}
-
-static void pl310_resume(void)
-{
- u32 l2x0_revision;
-
- if (!(readl_relaxed(l2x0_base + L2X0_CTRL) & L2X0_CTRL_EN)) {
- /* restore pl310 setup */
- writel_relaxed(l2x0_saved_regs.tag_latency,
- l2x0_base + L2X0_TAG_LATENCY_CTRL);
- writel_relaxed(l2x0_saved_regs.data_latency,
- l2x0_base + L2X0_DATA_LATENCY_CTRL);
- writel_relaxed(l2x0_saved_regs.filter_end,
- l2x0_base + L2X0_ADDR_FILTER_END);
- writel_relaxed(l2x0_saved_regs.filter_start,
- l2x0_base + L2X0_ADDR_FILTER_START);
-
- l2x0_revision = readl_relaxed(l2x0_base + L2X0_CACHE_ID) &
- L2X0_CACHE_ID_RTL_MASK;
-
- if (l2x0_revision >= L310_CACHE_ID_RTL_R2P0) {
- writel_relaxed(l2x0_saved_regs.prefetch_ctrl,
- l2x0_base + L2X0_PREFETCH_CTRL);
- if (l2x0_revision >= L310_CACHE_ID_RTL_R3P0)
- writel_relaxed(l2x0_saved_regs.pwr_ctrl,
- l2x0_base + L2X0_POWER_CTRL);
- }
- }
-
- l2x0_resume();
-}
-
static const struct l2c_init_data of_pl310_data __initconst = {
.of_parse = pl310_of_parse,
.enable = l2c310_enable,
--
1.8.3.1
next prev parent reply other threads:[~2014-03-17 0:15 UTC|newest]
Thread overview: 51+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-03-17 0:13 [PATCH 00/44] outer cache changes Russell King - ARM Linux
2014-03-17 0:13 ` [PATCH 01/44] ARM: l2c: remove outer_inv_all() method Russell King
2014-03-17 0:13 ` [PATCH 02/44] ARM: l2c: remove unnecessary call to outer_flush_all() Russell King
2014-03-17 0:13 ` [PATCH 03/44] ARM: l2c: avoid calling outer_flush_all() unnecessarily (Spear) Russell King
2014-03-17 0:13 ` [PATCH 04/44] ARM: l2c: add helper for L2 cache controller DT IDs Russell King
2014-03-26 20:30 ` Rob Herring
2014-03-17 0:13 ` [PATCH 05/44] ARM: l2c: tidy up l2x0_of_data declarations Russell King
2014-03-17 0:14 ` [PATCH 06/44] ARM: l2c: rename OF specific things, making l2x0_of_data available to all Russell King
2014-03-17 0:14 ` [PATCH 07/44] ARM: l2c: provide generic function for calling set_debug method Russell King
2014-03-17 0:14 ` [PATCH 08/44] ARM: l2c: split out cache unlock code Russell King
2014-03-17 0:14 ` [PATCH 09/44] ARM: l2c: provide generic helper for way-based operations Russell King
2014-03-17 0:14 ` [PATCH 10/44] ARM: l2c: rename cache_wait_way() Russell King
2014-03-17 0:14 ` [PATCH 11/44] ARM: l2c: use add L2C revision constants Russell King
2014-03-17 0:14 ` [PATCH 12/44] ARM: l2c: clean up OF initialisation a bit Russell King
2014-03-17 0:14 ` [PATCH 13/44] ARM: l2c: pass iomem address into data->save function Russell King
2014-03-17 0:14 ` [PATCH 14/44] ARM: l2c: move l2c save function to __l2c_init() Russell King
2014-03-17 0:14 ` [PATCH 15/44] ARM: l2c: provide enable method Russell King
2014-03-17 0:14 ` [PATCH 16/44] ARM: l2c: move aurora broadcast setup to enable function Russell King
2014-03-17 0:14 ` [PATCH 17/44] ARM: l2c: group implementation specific code together Russell King
2014-03-17 0:15 ` [PATCH 18/44] ARM: l2c: implement fixups for L2 cache controller quirks/errata Russell King
2014-03-17 0:15 ` [PATCH 19/44] ARM: l2c: clean up L2 cache initialisation messages Russell King
2014-03-17 0:15 ` [PATCH 20/44] ARM: l2c: split L2C-310 enable function from l2x0 code Russell King
2014-03-17 0:15 ` Russell King [this message]
2014-03-17 0:15 ` [PATCH 22/44] ARM: l2c: clean up save/resume functions Russell King
2014-03-17 0:15 ` [PATCH 23/44] ARM: l2c: simplify l2x0 unlocking code Russell King
2014-03-17 0:15 ` [PATCH 24/44] ARM: l2c: move pl310_set_debug() into l2c-310 code Russell King
2014-03-17 0:15 ` [PATCH 25/44] ARM: l2c: add L2C-210 specific handlers Russell King
2014-03-17 0:15 ` [PATCH 26/44] ARM: l2c: implement L2C-310 erratum 727915 as a method override Russell King
2014-03-17 0:15 ` [PATCH 27/44] ARM: l2c: Implement L2C-310 erratum 588369 " Russell King
2014-03-17 0:15 ` [PATCH 28/44] ARM: l2c: use L2C-210 handlers for L2C-310 errata-less implementations Russell King
2014-03-17 0:15 ` [PATCH 29/44] ARM: l2c: add L2C-220 specific handlers Russell King
2014-03-17 0:16 ` [PATCH 30/44] ARM: l2c: remove obsolete l2x0 ops for non-OF init Russell King
2014-03-17 0:16 ` [PATCH 31/44] ARM: l2c: move type string into l2c_init_data structure Russell King
2014-03-17 0:16 ` [PATCH 32/44] ARM: l2c: add decode for L2C-220 cache ways Russell King
2014-03-17 0:16 ` [PATCH 33/44] ARM: l2c: move way size calculation data into l2c_init_data Russell King
2014-03-17 0:16 ` [PATCH 34/44] ARM: outer cache: add documentation of outer cache functions Russell King
2014-03-17 0:16 ` [PATCH 35/44] ARM: outer cache: add WARN_ON() to outer_disable() Russell King
2014-03-17 0:16 ` [PATCH 36/44] ARM: l2c: move errata configuration options to arch/arm/mm/Kconfig Russell King
2014-03-17 0:16 ` [PATCH 37/44] ARM: l2c: provide generic hook to intercept writes to secure registers Russell King
2014-03-17 0:16 ` [PATCH 38/44] ARM: l2c: OMAP: implement new write_sec method Russell King
2014-03-17 0:16 ` [PATCH 39/44] ARM: l2c: highbank: " Russell King
2014-03-26 20:35 ` Rob Herring
2014-03-17 0:16 ` [PATCH 40/44] ARM: l2c: ux500: implement dummy " Russell King
2014-03-17 0:17 ` [PATCH 41/44] ARM: l2c: remove old .set_debug method Russell King
2014-03-17 0:17 ` [PATCH 42/44] ARM: l2c: implement L2C-310 erratum 752271 in core L2C code Russell King
2014-03-17 0:17 ` [PATCH 43/44] ARM: l2c: rename all L2C-310 constants with an L310_ prefix Russell King
2014-03-17 0:17 ` [PATCH 44/44] ARM: l2c: add L2C-310 power control DT properties Russell King
2014-03-26 21:08 ` Rob Herring
2014-03-28 13:29 ` Russell King - ARM Linux
2014-03-26 20:05 ` [PATCH 00/44] outer cache changes Gregory CLEMENT
2014-03-28 18:50 ` Nishanth Menon
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