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[178.165.167.132]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4a18bb6beaesm182472605e9.0.2026.10.12.12.20.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Oct 2026 12:20:45 -0700 (PDT) From: Stefan =?UTF-8?B?RMO2c2luZ2Vy?= To: linux-arm-kernel@lists.infradead.org, Navid Ghahremani Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, arnd@arndb.de, linux@armlinux.org.uk, robh@kernel.org, krzk@kernel.org, Navid Ghahremani Subject: Re: [PATCH RFC 00/24] ARM: zte: Add support for Sanechips ZX279128S and ZTE ZXHN H3600 Date: Mon, 12 Oct 2026 21:20:39 +0200 Message-ID: In-Reply-To: <20261010130024.177503-1-ghahramani.navid@gmail.com> References: <20261010130024.177503-1-ghahramani.navid@gmail.com> MIME-Version: 1.0 Content-Type: multipart/signed; boundary="nextPartgYuGsmX0Q9y6iZp1YqP84g"; micalg="pgp-sha256"; protocol="application/pgp-signature" X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261012_122048_908852_9AF1DF4D X-CRM114-Status: GOOD ( 16.04 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org --nextPartgYuGsmX0Q9y6iZp1YqP84g Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8"; protected-headers="v1" From: Stefan =?UTF-8?B?RMO2c2luZ2Vy?= Date: Mon, 12 Oct 2026 21:20:39 +0200 Message-ID: In-Reply-To: <20261010130024.177503-1-ghahramani.navid@gmail.com> References: <20261010130024.177503-1-ghahramani.navid@gmail.com> MIME-Version: 1.0 Hi, Am Samstag, 10. Oktober 2026, 14:59:38 Mitteleurop=C3=A4ische Sommerzeit sc= hrieb=20 Navid Ghahremani: > This series introduces mainline Linux support for the Sanechips (ZTE) > ZX279128S SoC and the ZTE ZXHN H3600 Wi-Fi 6 router. >=20 > The ZX279128S is a dual-core ARM Cortex-A9 network SoC with an ARM PL310 / > L2C-310 outer cache controller, dual PCIe interfaces, a 5-port Gigabit > Ethernet switch with hardware packet classification and flow offload, > SPI-NAND flash controller, and DWC3 USB 2.0 host. =46irst of all it is nice to see more interest in the ZTE zx hardware and i= t=20 looks like there is a considerable driver reuse potential between zx27 and= =20 zx29. I replied to individual patches with technical points. For the PCIe and=20 Ethernet/MDIO parts I can't say much as I don't have experience with these= =20 buses. My overarching concern with the series is that it largely looks like an LLM= =20 translation of ZTE's downstream sources. I don't see a problem with LLM use= =20 per se, but the question is how well Navid understands the hardware and can= =20 handle cases where ZTE's code is wrong or misleading (I certainly ran into= =20 this on zx29) and make independent judgement calls. What I'd like to see is an improved clock driver that fills some of the=20 hardware understanding gaps I pointed out in patch 7 and a pinmux driver th= at=20 goes beyond a few hardcoded values. Cheers, Stefan --nextPartgYuGsmX0Q9y6iZp1YqP84g Content-Type: application/pgp-signature; name="signature.asc" Content-Description: This is a digitally signed message part. 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