Am Mittwoch, 14. Oktober 2026, 09:20:48 Mitteleuropäische Sommerzeit schrieb 
Navid Ghahremani:
> + * Each bank has 16 lines, one bit per line in each register. The registers
> + * at 0x04-0x10 and 0x28-0x34 control the interrupts, which are not
> supported + * yet.
> + */
> +#define ZX279128S_GPIO_DIR	0x00	/* 1: output */
> +#define ZX279128S_GPIO_DATA	0x14	/* line level */
> +#define ZX279128S_GPIO_SET	0x18	/* write 1: drive high */
> +#define ZX279128S_GPIO_CLEAR	0x1c	/* write 1: drive low */

Fyi, there is also Documentation/devicetree/bindings/gpio/gpio-mmio.yaml, 
which allows you to put this directly into the DTS without a driver shim.