RE: [PATCH v7 4/9] media: chips-media: wave6: Add v4l2 m2m driver support

[Nas Chung <nas.chung@chipsnmedia.com>]

Hi, Frank.

>-----Original Message-----
>From: Frank Li <Frank.li@oss.nxp.com>
>Sent: Friday, September 11, 2026 5:37 AM
>To: Nas Chung <nas.chung@chipsnmedia.com>
>Cc: mchehab@kernel.org; hverkuil@xs4all.nl; robh@kernel.org;
>krzk+dt@kernel.org; conor+dt@kernel.org; shawnguo@kernel.org;
>s.hauer@pengutronix.de; linux-media@vger.kernel.org;
>devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; linux-imx@nxp.com;
>linux-arm-kernel@lists.infradead.org; jackson.lee
><jackson.lee@chipsnmedia.com>; lafley.kim <lafley.kim@chipsnmedia.com>;
>marek.vasut@mailbox.org; Ming Qian <ming.qian@oss.nxp.com>
>Subject: Re: [PATCH v7 4/9] media: chips-media: wave6: Add v4l2 m2m driver
>support
>
>On Fri, Sep 04, 2026 at 03:46:30PM +0900, Nas Chung wrote:
>> Add v4l2 m2m stateful driver support for the
>> Chips&Media Wave6 video codec IP, including both encoder and decoder.
>>
>> The following features and formats are supported:
>> Encoder (8bit only):
>> - Supported codecs: AVC, HEVC
>> - Supported input formats:
>>   * V4L2_PIX_FMT_YUV420/NV12/NV21
>>   * V4L2_PIX_FMT_YUV422P/NV16/NV61
>>   * V4L2_PIX_FMT_YUYV
>>   * V4L2_PIX_FMT_YUV24/NV24/NV42
>>   * V4L2_PIX_FMT_RGB24
>>   * V4L2_PIX_FMT_P010
>>   * V4L2_PIX_FMT_ARGB32
>>   * V4L2_PIX_FMT_RGBA32
>>   * V4L2_PIX_FMT_XRGB32
>>   * V4L2_PIX_FMT_ARGB2101010
>> - Supports multiplanar format
>> - Although 10-bit input formats are supported (e.g., P010, ARGB2101010),
>>   encoded output is limited to 8-bit streams
>> - Supports crop
>> - Supports extensive v4l2 encoder control
>>
>> Decoder (8bit only):
>> - Supported codecs: AVC, HEVC (8bit only)
>> - Supported output formats: V4L2_PIX_FMT_YUV420/NV12/NV21
>> - Supports multiplanar format
>> - Supports scale down
>> - Supports dynamic resolution change
>>
>> Note: While other versions of the Wave6 IP may support VP9 decoding and
>> AV1 decoding and encoding those formats are not implemented or validated
>> in this driver at this time.
>>
>> Signed-off-by: Nas Chung <nas.chung@chipsnmedia.com>
>> Tested-by: Ming Qian <ming.qian@oss.nxp.com>
>> Tested-by: Marek Vasut <marek.vasut@mailbox.org>
>> ---
>...
>> +
>> +u64 wave6_vpu_cycle_to_ns(struct vpu_core_device *core, u64 cycle)
>> +{
>> +	unsigned long rate;
>> +
>> +	if (!core->num_clks || !core->clks)
>> +		return 0;
>> +
>> +	rate = clk_get_rate(core->clks[0].clk);
>> +	if (!rate)
>> +		return 0;
>> +
>> +	return (cycle * NSEC_PER_SEC) / rate;
>
>div_u64, otherwise 32bit compiler build failure.

I'll fix this in v8.

Thanks.
Nas.

>
>Frank
>> +}
>> +
>> +int wave6_vpu_wait_interrupt(struct vpu_instance *inst, unsigned int
>timeout)
>> +{
>> +	int ret;
>> +
>> +	ret = wait_for_completion_timeout(&inst->irq_done,
>> +					  msecs_to_jiffies(timeout));
>> +	if (!ret)
>> +		return -ETIMEDOUT;
>> +
>> +	reinit_completion(&inst->irq_done);
>> +
>> +	return 0;
>> +}
>> +