From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D2336C63697 for ; Mon, 16 Nov 2020 22:09:21 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 42102223BF for ; Mon, 16 Nov 2020 22:09:21 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="h+fyx4BY" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 42102223BF Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=6XrzSxMNhl/v2GYqydF6av84UtLXIMerVtDYIGNMmvg=; b=h+fyx4BYMOvfeadCeGFtYgQuH 4HqqMopajsSlTKX0THzp51aDYfwaBX5pIzHIVmNG6x9OYzwmI62wgSjFINUI9vWd/OYb8rYGXwKB3 ecDOCJV6WS0obTeu2550Vzzq3uh96lOx/9MG8paKmkasCMw72PVYiP9+ehrHEJ9rGi8soxhGwchpk Jwa/BaA/1ctbTrLNsU2sVitxkMKlDBm0ySUdjVLrUA9c98szT/oFyV8929zp9OM8jEBOuNYeZdFth HymkA7SYGEanrLZW19Eb58rxs1C/03S7Wy+y7yGQDjB8B1j2/tYBrHs0xNVXuHDseuJ+gsS1O+E0Y 6yvBdl0kA==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kemfy-0006eD-KY; Mon, 16 Nov 2020 22:08:42 +0000 Received: from mail.kernel.org ([198.145.29.99]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kemfw-0006dj-He for linux-arm-kernel@lists.infradead.org; Mon, 16 Nov 2020 22:08:41 +0000 Received: from trantor (unknown [2.26.170.190]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 06EEA223BF; Mon, 16 Nov 2020 22:08:36 +0000 (UTC) Date: Mon, 16 Nov 2020 22:08:34 +0000 From: Catalin Marinas To: "Eric W. Biederman" Subject: Re: [PATCH v16 6/6] arm64: expose FAR_EL1 tag bits in siginfo Message-ID: References: <81e1307108ca8ea67aa1060f6f47b34a507410f1.1605235762.git.pcc@google.com> <87d00dge6e.fsf@x220.int.ebiederm.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <87d00dge6e.fsf@x220.int.ebiederm.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201116_170840_748817_429C8F6B X-CRM114-Status: GOOD ( 32.97 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Collingbourne , Helge Deller , Kevin Brodsky , Oleg Nesterov , linux-api@vger.kernel.org, "James E.J. Bottomley" , Kostya Serebryany , Linux ARM , Andrey Konovalov , David Spickett , Vincenzo Frascino , Will Deacon , Dave Martin , Evgenii Stepanov Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, Nov 16, 2020 at 03:55:05PM -0600, Eric W. Biederman wrote: > Catalin Marinas writes: > > On Thu, Nov 12, 2020 at 06:53:36PM -0800, Peter Collingbourne wrote: > >> diff --git a/Documentation/arm64/tagged-pointers.rst b/Documentation/arm64/tagged-pointers.rst > >> index eab4323609b9..19d284b70384 100644 > >> --- a/Documentation/arm64/tagged-pointers.rst > >> +++ b/Documentation/arm64/tagged-pointers.rst > >> @@ -53,12 +53,25 @@ visibility. > >> Preserving tags > >> --------------- > >> > >> -Non-zero tags are not preserved when delivering signals. This means that > >> -signal handlers in applications making use of tags cannot rely on the > >> -tag information for user virtual addresses being maintained for fields > >> -inside siginfo_t. One exception to this rule is for signals raised in > >> -response to watchpoint debug exceptions, where the tag information will > >> -be preserved. > >> +When delivering signals, non-zero tags are not preserved in > >> +siginfo.si_addr unless the flag SA_EXPOSE_TAGBITS was set in > >> +sigaction.sa_flags when the signal handler was installed. This means > >> +that signal handlers in applications making use of tags cannot rely > >> +on the tag information for user virtual addresses being maintained > >> +in these fields unless the flag was set. > >> + > >> +Due to architecture limitations, bits 63:60 of the fault address > >> +are not preserved in response to synchronous tag check faults > >> +(SEGV_MTESERR) even if SA_EXPOSE_TAGBITS was set. Applications should > >> +treat the values of these bits as undefined in order to accommodate > >> +future architecture revisions which may preserve the bits. > > > > If future architecture versions will preserve these bits, most likely > > we'll add a new HWCAP bit so that the user knows what's going on. But > > the user shouldn't rely on them being 0, just in case. > > > >> +For signals raised in response to watchpoint debug exceptions, the > >> +tag information will be preserved regardless of the SA_EXPOSE_TAGBITS > >> +flag setting. > >> + > >> +Non-zero tags are never preserved in sigcontext.fault_address > >> +regardless of the SA_EXPOSE_TAGBITS flag setting. > > > > We could've done it the other way around (fault_address tagged, si_addr > > untagged) but that would be specific to arm64, so I think we should > > solve it for other architectures that implement (or plan to) tagging. > > The fault_address in the arm64 sigcontext was an oversight, we should > > have removed it but when we realised it was already ABI. > > > > Anyway, I'm fine with the arm64 changes here: > > > > Reviewed-by: Catalin Marinas > > > > With Eric's ack, I'm happy to take the series through the arm64 tree, > > otherwise Eric's tree is fine as well. > > In general I am fine with the last two patches. > > I want to understand where the value for SA_UNSUPPORTED comes from, and > while I have good answers I am still digesting the question of if > SA_EXPOSE_TAGBITS should be implemented in the arch specific header or > in a generic header. I quite agree it should have a generic > definition/implementation. I just don't know if it makes sense to make > the value available to userspace if the architecture does not have > tagbits. Mostly my concern is about bit consumption as we only have > 30ish sigaction bits. An alternative would be to make this opt-in per process (or thread) based on a prctl() call. We already have one for PR_TAGGED_ADDR_ENABLE to allow tagged addresses from user at the syscall ABI level. Another bit in there would allow si_addr to be tagged. The disadvantage is that this is quite coarse control affecting other signal handlers. > I will follow with my acks when I have resolved those issues. Thanks. -- Catalin _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel