From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 35E55C636D6 for ; Thu, 23 Feb 2023 13:57:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=K1OLvUvlqKerHTQXHD88bs0TRvAZxW/sF6jTdwA1DmU=; b=SK+bEk0UT7tWFU ZzRIwl9eeQt7Z4vWD5t7A75e95uBqf9I2ivG0L7iCoK1/yimS9u5HltSuetvqguw6ipGpynytRMv/ Ougp3oysnUScaJYk6xRiBufQQCcIkfSuotYOLawGjOJ+a4MdAunCeDeWiZUNWACCPie9eRJ2YOroN vfnPLTGAwyuwE1tYl0n62yPECSsIwxjMbpSxdPxCYV0vMLCZKvFlSHCowpXXXDqz1uHQQKbH0kdcu zLUdNb/E85z0EO7k4YhhHMy3hCscNCbHh//bM/sw0cd99DhUEIUcpwtHteYwS+EfdSOWXUaa4zZ1Q WUBYnQEmPGNm+kVwbaHg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1pVC4k-00Gf0L-C6; Thu, 23 Feb 2023 13:55:58 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1pVBwh-00Ga25-5v for linux-arm-kernel@lists.infradead.org; Thu, 23 Feb 2023 13:47:41 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B8137FEC; Thu, 23 Feb 2023 05:48:20 -0800 (PST) Received: from FVFF77S0Q05N.cambridge.arm.com (FVFF77S0Q05N.cambridge.arm.com [10.1.35.146]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id EA2273F881; Thu, 23 Feb 2023 05:47:36 -0800 (PST) Date: Thu, 23 Feb 2023 13:47:34 +0000 From: Mark Rutland To: Anshuman Khandual Cc: "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , Catalin Marinas , Will Deacon Subject: Re: [PATCH V7 5/6] arm64/perf: Add branch stack support in ARMV8 PMU Message-ID: References: <20230105031039.207972-1-anshuman.khandual@arm.com> <20230105031039.207972-6-anshuman.khandual@arm.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230223_054739_313050_3B88A5E3 X-CRM114-Status: GOOD ( 19.71 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, Feb 13, 2023 at 01:53:56PM +0530, Anshuman Khandual wrote: > > > On 2/9/23 01:06, Mark Rutland wrote: > > On Fri, Jan 13, 2023 at 10:41:51AM +0530, Anshuman Khandual wrote: > >> > >> > >> On 1/12/23 19:59, Mark Rutland wrote: > >>> On Thu, Jan 05, 2023 at 08:40:38AM +0530, Anshuman Khandual wrote: > >>>> @@ -878,6 +890,13 @@ static irqreturn_t armv8pmu_handle_irq(struct arm_pmu *cpu_pmu) > >>>> if (!armpmu_event_set_period(event)) > >>>> continue; > >>>> > >>>> + if (has_branch_stack(event)) { > >>>> + WARN_ON(!cpuc->branches); > >>>> + armv8pmu_branch_read(cpuc, event); > >>>> + data.br_stack = &cpuc->branches->branch_stack; > >>>> + data.sample_flags |= PERF_SAMPLE_BRANCH_STACK; > >>>> + } > >>> > >>> How do we ensure the data we're getting isn't changed under our feet? Is BRBE > >>> disabled at this point? > >> > >> Right, BRBE is paused after a PMU IRQ. We also ensure the buffer is disabled for > >> all exception levels, i.e removing BRBCR_EL1_E0BRE/E1BRE from the configuration, > >> before initiating the actual read, which eventually populates the data.br_stack. > > > > Ok; just to confirm, what exactly is the condition that enforces that BRBE is > > disabled? Is that *while* there's an overflow asserted, or does something else > > get set at the instant the overflow occurs? > > - BRBE can be disabled completely via BRBCR_EL1_E0BRE/E1BRE irrespective of PMU interrupt > - But with PMU interrupt, it just pauses if BRBCR_EL1_FZP is enabled IIUC the distinction between "disabled completely" and "just pauses" doesn't really matter to us, and a pause is sufficient for use to be able to read and manipulate the records. I also note that we always set BRBCR_EL1.FZP. Am I missing something? Thanks, Mark. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel