[PATCH v5 3/5] ARM: dts: hpe: Add I2C Topology

nick.hawkins
2023-02-17T15:56:43Z

Add 9 I2C Engines, 2 MUXs, and a EEPROM to the device tree.

Signed-off-by: Nick Hawkins <nick.hawkins@hpe.com>

---

v5:
*No change
v4:
*No change
v3:
*No change
v2:
*Made i2cX a generic node name i2c in the dts
*Added status field to dtsi and dts for i2c bus
---
arch/arm/boot/dts/hpe-bmc-dl360gen10.dts | 109 ++++++++++++++++++++
arch/arm/boot/dts/hpe-gxp.dtsi | 125 +++++++++++++++++++++++
2 files changed, 234 insertions(+)

diff --git a/arch/arm/boot/dts/hpe-bmc-dl360gen10.dts b/arch/arm/boot/dts/hpe-bmc-dl360gen10.dts
index 3a7382ce40ef..1f2547fe9ae3 100644
--- a/arch/arm/boot/dts/hpe-bmc-dl360gen10.dts
+++ b/arch/arm/boot/dts/hpe-bmc-dl360gen10.dts
@@ -23,4 +23,113 @@
device_type = "memory";
reg = <0x40000000 0x20000000>;
};
+
+ i2cmux@4 {
+ compatible = "i2c-mux-reg";
+ i2c-parent = <&i2c4>;
+ reg = <0xd1000074 0x1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ i2c@1 {
+ reg = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ i2c@3 {
+ reg = <3>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ i2c@4 {
+ reg = <4>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
+ i2cmux@6 {
+ compatible = "i2c-mux-reg";
+ i2c-parent = <&i2c6>;
+ reg = <0xd1000076 0x1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ i2c@1 {
+ reg = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ i2c@2 {
+ reg = <2>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ i2c@3 {
+ reg = <3>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ i2c@4 {
+ reg = <4>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ i2c@5 {
+ reg = <5>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+};
+
+&i2c0 {
+ status = "okay";
+};
+
+&i2c1 {
+ status = "okay";
+};
+
+&i2c2 {
+ status = "okay";
+ eeprom@50 {
+ compatible = "atmel,24c02";
+ pagesize = <8>;
+ reg = <0x50>;
+ };
+};
+
+&i2c3 {
+ status = "okay";
+};
+
+&i2c4 {
+ status = "okay";
+};
+
+&i2c5 {
+ status = "okay";
+};
+
+&i2c6 {
+ status = "okay";
+};
+
+&i2c7 {
+ status = "okay";
+};
+
+&i2c8 {
+ status = "okay";
+};
+
+&i2c9 {
+ status = "okay";
};
diff --git a/arch/arm/boot/dts/hpe-gxp.dtsi b/arch/arm/boot/dts/hpe-gxp.dtsi
index cf735b3c4f35..3bc071149bae 100644
--- a/arch/arm/boot/dts/hpe-gxp.dtsi
+++ b/arch/arm/boot/dts/hpe-gxp.dtsi
@@ -122,6 +122,131 @@
interrupts = <6>;
interrupt-parent = <&vic0>;
};
+
+ sysreg_system_controller: syscon@f8 {
+ compatible = "hpe,gxp-sysreg", "syscon";
+ reg = <0xf8 0x8>;
+ };
+
+ i2c0: i2c@2000 {
+ compatible = "hpe,gxp-i2c";
+ reg = <0x2000 0x70>;
+ interrupts = <9>;
+ interrupt-parent = <&vic0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ hpe,sysreg = <&sysreg_system_controller>;
+ clock-frequency = <100000>;
+ };
+
+ i2c1: i2c@2100 {
+ compatible = "hpe,gxp-i2c";
+ reg = <0x2100 0x70>;
+ interrupts = <9>;
+ interrupt-parent = <&vic0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ hpe,sysreg = <&sysreg_system_controller>;
+ clock-frequency = <100000>;
+ };
+
+ i2c2: i2c@2200 {
+ compatible = "hpe,gxp-i2c";
+ reg = <0x2200 0x70>;
+ interrupts = <9>;
+ interrupt-parent = <&vic0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ hpe,sysreg = <&sysreg_system_controller>;
+ clock-frequency = <100000>;
+ };
+
+ i2c3: i2c@2300 {
+ compatible = "hpe,gxp-i2c";
+ reg = <0x2300 0x70>;
+ interrupts = <9>;
+ interrupt-parent = <&vic0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ hpe,sysreg = <&sysreg_system_controller>;
+ clock-frequency = <100000>;
+ };
+
+ i2c4: i2c@2400 {
+ compatible = "hpe,gxp-i2c";
+ reg = <0x2400 0x70>;
+ interrupts = <9>;
+ interrupt-parent = <&vic0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ hpe,sysreg = <&sysreg_system_controller>;
+ clock-frequency = <100000>;
+ };
+
+ i2c5: i2c@2500 {
+ compatible = "hpe,gxp-i2c";
+ reg = <0x2500 0x70>;
+ interrupts = <9>;
+ interrupt-parent = <&vic0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ hpe,sysreg = <&sysreg_system_controller>;
+ clock-frequency = <100000>;
+ };
+
+ i2c6: i2c@2600 {
+ compatible = "hpe,gxp-i2c";
+ reg = <0x2600 0x70>;
+ interrupts = <9>;
+ interrupt-parent = <&vic0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ hpe,sysreg = <&sysreg_system_controller>;
+ clock-frequency = <100000>;
+ };
+
+ i2c7: i2c@2700 {
+ compatible = "hpe,gxp-i2c";
+ reg = <0x2700 0x70>;
+ interrupts = <9>;
+ interrupt-parent = <&vic0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ hpe,sysreg = <&sysreg_system_controller>;
+ clock-frequency = <100000>;
+ };
+
+ i2c8: i2c@2800 {
+ compatible = "hpe,gxp-i2c";
+ reg = <0x2800 0x70>;
+ interrupts = <9>;
+ interrupt-parent = <&vic0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ hpe,sysreg = <&sysreg_system_controller>;
+ clock-frequency = <100000>;
+ };
+
+ i2c9: i2c@2900 {
+ compatible = "hpe,gxp-i2c";
+ reg = <0x2900 0x70>;
+ interrupts = <9>;
+ interrupt-parent = <&vic0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ hpe,sysreg = <&sysreg_system_controller>;
+ clock-frequency = <100000>;
+ };
};
};
};