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[5.69.146.176]) by smtp.gmail.com with ESMTPSA id i11-20020a05600c290b00b003e215973a96sm977173wmd.16.2023.02.16.02.47.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Feb 2023 02:47:30 -0800 (PST) Date: Thu, 16 Feb 2023 10:47:29 +0000 From: Jean-Philippe Brucker To: Leon Romanovsky Cc: Bjorn Helgaas , Ganapatrao Kulkarni , linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, bhelgaas@google.com, darren@os.amperecomputing.com, scott@os.amperecomputing.com, Will Deacon , Robin Murphy , Joerg Roedel , linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev Subject: Re: [PATCH] PCI/ATS: Allow to enable ATS on VFs even if it is not enabled on PF Message-ID: References: <20230215205726.GA3213227@bhelgaas> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230216_024736_638051_D3BE6932 X-CRM114-Status: GOOD ( 25.95 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Feb 16, 2023 at 09:46:51AM +0200, Leon Romanovsky wrote: > On Thu, Feb 16, 2023 at 09:26:15AM +0200, Leon Romanovsky wrote: > > On Wed, Feb 15, 2023 at 02:57:26PM -0600, Bjorn Helgaas wrote: > > > [+cc Will, Robin, Joerg for arm-smmu-v3 page size question] > > > > > > On Sun, Feb 12, 2023 at 08:14:48PM +0200, Leon Romanovsky wrote: > > > > On Wed, Feb 08, 2023 at 10:43:21AM -0800, Ganapatrao Kulkarni wrote: > > > > > As per PCIe specification(section 10.5), If a VF implements an > > > > > ATS capability, its associated PF must implement an ATS capability. > > > > > The ATS Capabilities in VFs and their associated PFs are permitted to > > > > > be enabled independently. > > > > > Also, it states that the Smallest Translation Unit (STU) for VFs must be > > > > > hardwired to Zero and the associated PF's value applies to VFs STU. > > > > > > > > > > The current code allows to enable ATS on VFs only if it is already > > > > > enabled on associated PF, which is not necessary as per the specification. > > > > > > > > > > It is only required to have valid STU programmed on PF to enable > > > > > ATS on VFs. Adding code to write the first VFs STU to a PF's STU > > > > > when PFs ATS is not enabled. > > > > > > > > Can you please add here quotes from the spec and its version? I don't see > > > > anything like this in my version of PCIe specification. In PCIe r6.0, 10.5.1 ATS Extended Capability: "The ATS Capabilities in VFs and their associated PFs are permitted to be enabled independently." > For VFs, this field must be hardwired to Zero. The associated PF's value applies. > Default value is 0 0000b" And this sentence indicates that the PF's STU should be configured appropriately in order to use ATS in the VF. So a driver is permitted to enable the VF ATS capability without enabling the PF ATS cap, though the STU value of the PF cap still applies. But the first sentence is weak ("permitted" instead of "required"), so as Joerg said, some device implementations may still require to enable the PF cap in order to enable the VF cap. Maybe we could have a list of vendor:device IDs which allow enabling the VF cap independently? Thanks, Jean _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel