From: Tony Lindgren <tony@atomide.com>
To: Daniel Lezcano <daniel.lezcano@linaro.org>,
Thomas Gleixner <tglx@linutronix.de>
Cc: Georgi Vlaev <g-vlaev@ti.com>,
Grygorii Strashko <grygorii.strashko@ti.com>,
Keerthy <j-keerthy@ti.com>, Ladislav Michl <ladis@linux-mips.org>,
Nishanth Menon <nm@ti.com>, Suman Anna <s-anna@ti.com>,
Vignesh Raghavendra <vigneshr@ti.com>,
linux-kernel@vger.kernel.org, linux-omap@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [RFC PATCH 0/3] Make TI dmtimer features more usable
Date: Mon, 31 Oct 2022 14:07:10 +0200 [thread overview]
Message-ID: <Y1+6bmuup36ZF3H9@atomide.com> (raw)
In-Reply-To: <20221031115613.56229-1-tony@atomide.com>
* Tony Lindgren <tony@atomide.com> [221031 11:46]:
> I have only lightly tested this so far to make sure I get clock output on
> k3-am625-sk on TIMER_IO2 at user expansion connector pin 10.
For reference, I used something like the patch below to configure the timer2
for clock output.
Regards,
Tony
8< ---------------------
diff --git a/arch/arm64/boot/dts/ti/k3-am625-sk.dts b/arch/arm64/boot/dts/ti/k3-am625-sk.dts
--- a/arch/arm64/boot/dts/ti/k3-am625-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am625-sk.dts
@@ -143,6 +143,25 @@ led-0 {
default-state = "off";
};
};
+
+ main_pwm2: dmtimer-main-pwm-2 {
+ pinctrl-0 = <&main_timer2_pins_default>;
+ pinctrl-names = "default";
+ compatible = "ti,omap-dmtimer-pwm";
+ #pwm-cells = <3>;
+ ti,timers = <&main_timer2>;
+ interrupts-extended = <&main_timer2 2 IRQ_TYPE_EDGE_RISING>,
+ <&main_timer2 1 IRQ_TYPE_EDGE_RISING>,
+ <&main_timer2 0 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "compare", "overflow", "match";
+ clocks = <&main_timer2>;
+ };
+};
+
+&main_timer2 {
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ #clock-cells = <0>;
};
&main_pmx0 {
@@ -270,6 +289,13 @@ AM62X_IOPAD(0x07c, PIN_OUTPUT, 7) /* (P25) GPMC0_CLK.GPIO0_31 */
>;
};
+ main_timer2_pins_default: main-timer2-pins-default {
+ pinctrl-single,pins = <
+ /* (C15) PADCFG_CTRL_PADCONFIG118 0x000f41d8 TIMER_IO2 */
+ AM65X_IOPAD(0x1d8, PIN_OUTPUT, 2)
+ >;
+ };
+
main_gpio1_ioexp_intr_pins_default: main-gpio1-ioexp-intr-pins-default {
pinctrl-single,pins = <
AM62X_IOPAD(0x01d4, PIN_INPUT, 7) /* (B15) UART0_RTSn.GPIO1_23 */
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prev parent reply other threads:[~2022-10-31 12:08 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-31 11:56 [RFC PATCH 0/3] Make TI dmtimer features more usable Tony Lindgren
2022-10-31 11:56 ` [RFC PATCH 1/3] clocksource/drivers/timer-ti-dm: Add lock for register access Tony Lindgren
2022-10-31 11:56 ` [RFC PATCH 2/3] clocksource/drivers/timer-ti-dm: Implement chained irq Tony Lindgren
2022-10-31 11:56 ` [RFC PATCH 3/3] clocksource/drivers/timer-ti-dm: Add clock provider support Tony Lindgren
2022-10-31 12:07 ` Tony Lindgren [this message]
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