From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 38603ECAAA1 for ; Sun, 30 Oct 2022 17:31:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=NzaO+QqP9yI3doNrxw4MuSuLl2baZPAvZDCWmQOAVs8=; b=e02wmwA6Z3oNsZ qQChSDfI29KGz1A9dTjSuyngj5iU2lNkJFEnBAb9sNu0VK4nbwFClrdwqXefcVv3xyMsWp+mdK+WU Oxc2v/l+SkpbQePmt0OmUf2UYKw3UA7PkyRa1M25A7asroXyGWh723HHeNYaoHp03tpohb1C7roj9 nNvt1zPl14g1jMqnZY4tiuuG8QoVwWhkYf8DTkO23BiqBsBWHoWhtoz6y8lKE1aB34x7IK5dRdJ04 oOXWjovATUBzHwW8Y2JTSYBFFcZveNQPhScxWmRDqPkELNPz6LyapEre9et9fX6MniQGEpb/QGmuu O5GqVwgfrxOfgcNtptsQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1opC8a-001AUc-0X; Sun, 30 Oct 2022 17:30:20 +0000 Received: from ams.source.kernel.org ([145.40.68.75]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1opC8W-001ASY-K5 for linux-arm-kernel@lists.infradead.org; Sun, 30 Oct 2022 17:30:18 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 30DD4B80EBF; Sun, 30 Oct 2022 17:30:15 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 902F3C433C1; Sun, 30 Oct 2022 17:30:12 +0000 (UTC) Date: Sun, 30 Oct 2022 17:30:09 +0000 From: Catalin Marinas To: "Jason A. Donenfeld" Cc: will@kernel.org, jean-philippe@linaro.org, ardb@kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] random: remove early archrandom abstraction Message-ID: References: <20221028234025.82222-1-Jason@zx2c4.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20221028234025.82222-1-Jason@zx2c4.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221030_103016_859398_2C700544 X-CRM114-Status: GOOD ( 18.48 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Sat, Oct 29, 2022 at 01:40:25AM +0200, Jason A. Donenfeld wrote: > diff --git a/arch/arm64/include/asm/archrandom.h b/arch/arm64/include/asm/archrandom.h > index 109e2a4454be..8a059a9033af 100644 > --- a/arch/arm64/include/asm/archrandom.h > +++ b/arch/arm64/include/asm/archrandom.h > @@ -58,6 +58,16 @@ static inline bool __arm64_rndrrs(unsigned long *v) > return ok; > } > > +static __always_inline bool __cpu_has_rng(void) > +{ > + if (!system_capabilities_finalized()) { > + /* Open code as we run prior to the first call to cpufeature. */ > + unsigned long ftr = read_sysreg_s(SYS_ID_AA64ISAR0_EL1); > + return (ftr >> ID_AA64ISAR0_EL1_RNDR_SHIFT) & 0xf; > + } > + return cpus_have_const_cap(ARM64_HAS_RNG); > +} We need to be careful with this check as it is only valid on the CPU it was called on. Is the result used only on this CPU and with the preemption disabled? We have big.LITTLE systems where CPUs may differ and the ARM64_HAS_RNG feature may not be enabled once all the CPUs have been initialised (capabilities finalised). We could make this capability an ARM64_CPUCAP_BOOT_CPU_FEATURE, though I'd have to check whether any systems in the wild have such mixed CPUs. -- Catalin _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel