From: Ricardo Koller <ricarkol@google.com>
To: Oliver Upton <oliver.upton@linux.dev>
Cc: Marc Zyngier <maz@kernel.org>, James Morse <james.morse@arm.com>,
Alexandru Elisei <alexandru.elisei@arm.com>,
linux-arm-kernel@lists.infradead.org,
kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org,
Reiji Watanabe <reijiw@google.com>,
David Matlack <dmatlack@google.com>,
Quentin Perret <qperret@google.com>,
Ben Gardon <bgardon@google.com>, Gavin Shan <gshan@redhat.com>,
Peter Xu <peterx@redhat.com>, Will Deacon <will@kernel.org>,
Sean Christopherson <seanjc@google.com>,
kvmarm@lists.linux.dev
Subject: Re: [PATCH v3 12/15] KVM: arm64: Make block->table PTE changes parallel-aware
Date: Tue, 1 Nov 2022 19:22:49 -0700 [thread overview]
Message-ID: <Y2HUebPnIgzLim0w@google.com> (raw)
In-Reply-To: <20221027222247.1685023-1-oliver.upton@linux.dev>
On Thu, Oct 27, 2022 at 10:22:47PM +0000, Oliver Upton wrote:
> In order to service stage-2 faults in parallel, stage-2 table walkers
> must take exclusive ownership of the PTE being worked on. An additional
> requirement of the architecture is that software must perform a
> 'break-before-make' operation when changing the block size used for
> mapping memory.
>
> Roll these two concepts together into helpers for performing a
> 'break-before-make' sequence. Use a special PTE value to indicate a PTE
> has been locked by a software walker. Additionally, use an atomic
> compare-exchange to 'break' the PTE when the stage-2 page tables are
> possibly shared with another software walker. Elide the DSB + TLBI if
> the evicted PTE was invalid (and thus not subject to break-before-make).
>
> All of the atomics do nothing for now, as the stage-2 walker isn't fully
> ready to perform parallel walks.
>
> Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
> ---
> arch/arm64/kvm/hyp/pgtable.c | 82 +++++++++++++++++++++++++++++++++---
> 1 file changed, 76 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm64/kvm/hyp/pgtable.c b/arch/arm64/kvm/hyp/pgtable.c
> index 4c579b3beabf..1df858c21b2e 100644
> --- a/arch/arm64/kvm/hyp/pgtable.c
> +++ b/arch/arm64/kvm/hyp/pgtable.c
> @@ -49,6 +49,12 @@
> #define KVM_INVALID_PTE_OWNER_MASK GENMASK(9, 2)
> #define KVM_MAX_OWNER_ID 1
>
> +/*
> + * Used to indicate a pte for which a 'break-before-make' sequence is in
> + * progress.
> + */
> +#define KVM_INVALID_PTE_LOCKED BIT(10)
> +
> struct kvm_pgtable_walk_data {
> struct kvm_pgtable_walker *walker;
>
> @@ -674,6 +680,11 @@ static bool stage2_pte_is_counted(kvm_pte_t pte)
> return !!pte;
> }
>
> +static bool stage2_pte_is_locked(kvm_pte_t pte)
> +{
> + return !kvm_pte_valid(pte) && (pte & KVM_INVALID_PTE_LOCKED);
> +}
> +
> static bool stage2_try_set_pte(const struct kvm_pgtable_visit_ctx *ctx, kvm_pte_t new)
> {
> if (!kvm_pgtable_walk_shared(ctx)) {
> @@ -684,6 +695,64 @@ static bool stage2_try_set_pte(const struct kvm_pgtable_visit_ctx *ctx, kvm_pte_
> return cmpxchg(ctx->ptep, ctx->old, new) == ctx->old;
> }
>
> +/**
> + * stage2_try_break_pte() - Invalidates a pte according to the
> + * 'break-before-make' requirements of the
> + * architecture.
> + *
> + * @ctx: context of the visited pte.
> + * @data: stage-2 map data
> + *
> + * Returns: true if the pte was successfully broken.
> + *
> + * If the removed pte was valid, performs the necessary serialization and TLB
> + * invalidation for the old value. For counted ptes, drops the reference count
> + * on the containing table page.
> + */
> +static bool stage2_try_break_pte(const struct kvm_pgtable_visit_ctx *ctx,
> + struct stage2_map_data *data)
Would it be possible to pass "kvm_s2_mmu *mmu" directly (instead of
"stage2_map_data *data")? so this function can be reused by other
walkers. Another option would be to stash "struct kvm_s2_mmu" in
"struct kvm_pgtable_visit_ctx".
> +{
> + struct kvm_pgtable_mm_ops *mm_ops = ctx->mm_ops;
> +
> + if (stage2_pte_is_locked(ctx->old)) {
> + /*
> + * Should never occur if this walker has exclusive access to the
> + * page tables.
> + */
> + WARN_ON(!kvm_pgtable_walk_shared(ctx));
> + return false;
> + }
> +
> + if (!stage2_try_set_pte(ctx, KVM_INVALID_PTE_LOCKED))
> + return false;
> +
> + /*
> + * Perform the appropriate TLB invalidation based on the evicted pte
> + * value (if any).
> + */
> + if (kvm_pte_table(ctx->old, ctx->level))
> + kvm_call_hyp(__kvm_tlb_flush_vmid, data->mmu);
> + else if (kvm_pte_valid(ctx->old))
> + kvm_call_hyp(__kvm_tlb_flush_vmid_ipa, data->mmu, ctx->addr, ctx->level);
> +
> + if (stage2_pte_is_counted(ctx->old))
> + mm_ops->put_page(ctx->ptep);
> +
> + return true;
> +}
> +
> +static void stage2_make_pte(const struct kvm_pgtable_visit_ctx *ctx, kvm_pte_t new)
> +{
> + struct kvm_pgtable_mm_ops *mm_ops = ctx->mm_ops;
> +
> + WARN_ON(!stage2_pte_is_locked(*ctx->ptep));
> +
> + if (stage2_pte_is_counted(new))
> + mm_ops->get_page(ctx->ptep);
> +
> + smp_store_release(ctx->ptep, new);
> +}
> +
> static void stage2_put_pte(const struct kvm_pgtable_visit_ctx *ctx, struct kvm_s2_mmu *mmu,
> struct kvm_pgtable_mm_ops *mm_ops)
> {
> @@ -795,7 +864,7 @@ static int stage2_map_walk_leaf(const struct kvm_pgtable_visit_ctx *ctx,
> struct stage2_map_data *data)
> {
> struct kvm_pgtable_mm_ops *mm_ops = ctx->mm_ops;
> - kvm_pte_t *childp;
> + kvm_pte_t *childp, new;
> int ret;
>
> ret = stage2_map_walker_try_leaf(ctx, data);
> @@ -812,17 +881,18 @@ static int stage2_map_walk_leaf(const struct kvm_pgtable_visit_ctx *ctx,
> if (!childp)
> return -ENOMEM;
>
> + if (!stage2_try_break_pte(ctx, data)) {
> + mm_ops->put_page(childp);
> + return -EAGAIN;
> + }
> +
> /*
> * If we've run into an existing block mapping then replace it with
> * a table. Accesses beyond 'end' that fall within the new table
> * will be mapped lazily.
> */
> - if (stage2_pte_is_counted(ctx->old))
> - stage2_put_pte(ctx, data->mmu, mm_ops);
> -
> new = kvm_init_table_pte(childp, mm_ops);
> - mm_ops->get_page(ctx->ptep);
> - smp_store_release(ctx->ptep, new);
> + stage2_make_pte(ctx, new);
>
> return 0;
> }
> --
> 2.38.1.273.g43a17bfeac-goog
>
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next prev parent reply other threads:[~2022-11-02 2:24 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-27 22:17 [PATCH v3 00/15] KVM: arm64: Parallel stage-2 fault handling Oliver Upton
2022-10-27 22:17 ` [PATCH v3 01/15] KVM: arm64: Combine visitor arguments into a context structure Oliver Upton
2022-10-27 22:17 ` [PATCH v3 02/15] KVM: arm64: Stash observed pte value in visitor context Oliver Upton
2022-10-27 22:17 ` [PATCH v3 03/15] KVM: arm64: Pass mm_ops through the " Oliver Upton
2022-10-27 22:17 ` [PATCH v3 04/15] KVM: arm64: Don't pass kvm_pgtable through kvm_pgtable_walk_data Oliver Upton
2022-10-27 22:17 ` [PATCH v3 05/15] KVM: arm64: Add a helper to tear down unlinked stage-2 subtrees Oliver Upton
2022-10-27 22:17 ` [PATCH v3 06/15] KVM: arm64: Tear down unlinked stage-2 subtree after break-before-make Oliver Upton
2022-10-27 22:17 ` [PATCH v3 07/15] KVM: arm64: Use an opaque type for pteps Oliver Upton
2022-10-27 22:17 ` [PATCH v3 08/15] KVM: arm64: Protect stage-2 traversal with RCU Oliver Upton
2022-10-28 9:19 ` Oliver Upton
2022-11-01 20:22 ` Sean Christopherson
2022-10-27 22:17 ` [PATCH v3 09/15] KVM: arm64: Free removed stage-2 tables in RCU callback Oliver Upton
2022-11-01 20:28 ` Sean Christopherson
2022-11-01 20:46 ` Oliver Upton
2022-11-01 21:07 ` Sean Christopherson
2022-10-27 22:22 ` [PATCH v3 10/15] KVM: arm64: Atomically update stage 2 leaf attributes in parallel walks Oliver Upton
2022-10-27 22:22 ` [PATCH v3 11/15] KVM: arm64: Split init and set for table PTE Oliver Upton
2022-10-27 22:22 ` [PATCH v3 12/15] KVM: arm64: Make block->table PTE changes parallel-aware Oliver Upton
2022-11-02 2:22 ` Ricardo Koller [this message]
2022-11-02 23:03 ` Oliver Upton
2022-10-27 22:23 ` [PATCH v3 13/15] KVM: arm64: Make leaf->leaf " Oliver Upton
2022-10-27 22:23 ` [PATCH v3 14/15] KVM: arm64: Make table->block " Oliver Upton
2022-10-27 22:23 ` [PATCH v3 15/15] KVM: arm64: Handle stage-2 faults in parallel Oliver Upton
2022-10-27 23:39 ` [PATCH v3 00/15] KVM: arm64: Parallel stage-2 fault handling Oliver Upton
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