From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C1B2BC433FE for ; Wed, 9 Nov 2022 09:27:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=pqnE0iYW+RlEOeR2pEpxD6bYnaPg3UXXV94sYozdhd4=; b=mN6lZCYkVaui1y UiNkaVFnDa/yzZckixHyNT0XFCMpA/8inyeVrQDj5od0m1fdwsHg6XAXk0gzCizLoSf2g3LzTf6Sj xy0o6BVMUqSomKVjubt9KTTzTYlN1mNF6mvqB2CEG/mRK9vWG8ll8Xj3lcJROxg1gHmIls2XQcuKU 60uRQobkOrFYPD/4QeE+VF+EWGbeznbKSRo7CUPT98dHj8zQATVzoeXYPRfokbCL57Zg8IbgamMg7 j02nXGp1SlkAJ7MCUBZBXOnMG393iHtfRZKb0CzhCra2VL5m5cmKAF3lC2rKPjI3ez7kzcki2X7cS QQdRfwNS3WPTXHrRVCkQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oshLb-00CHtL-26; Wed, 09 Nov 2022 09:26:15 +0000 Received: from sin.source.kernel.org ([145.40.73.55]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oshLX-00CHjs-IW for linux-arm-kernel@lists.infradead.org; Wed, 09 Nov 2022 09:26:13 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sin.source.kernel.org (Postfix) with ESMTPS id 86D2ACE1D6D; Wed, 9 Nov 2022 09:26:05 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 0E472C433D6; Wed, 9 Nov 2022 09:26:02 +0000 (UTC) Date: Wed, 9 Nov 2022 09:25:59 +0000 From: Catalin Marinas To: richard clark Cc: mark.rutland@arm.com, linux-arm-kernel@lists.infradead.org Subject: Re: LDREX and STREX in =?utf-8?Q?heterogen?= =?utf-8?Q?eous_system=EF=BC=9F?= Message-ID: References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221109_012611_852666_3EFDE9EF X-CRM114-Status: GOOD ( 11.88 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Nov 09, 2022 at 04:34:13PM +0800, richard clark wrote: > Suppose in a heterogeneous system, there're cortex-M7 and cortex-A72 > sharing the same bus. Does the below code sequence work as (ldr/str)ex > expected? > > r2 point to a uncached shared memory between M7 and A72 > > M7 A72 > ldrex r1, [r2] > -------------------------> strex r0, r1, [r2] In general, it won't. The exclusives are supposed to work in the same inner shareable domain, so it depends on how the SoC has the M7 and A72 wired up. Are they cache coherent with each-other? Is there a global exclusive monitor? The M7 may also need the MPU regions set up with the Shareable attribute. -- Catalin _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel