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From: Mark Brown <broonie@kernel.org>
To: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>, Marc Zyngier <maz@kernel.org>,
	Zhang Lei <zhang.lei@jp.fujitsu.com>,
	James Morse <james.morse@arm.com>,
	Alexandru Elisei <alexandru.elisei@arm.com>,
	Andre Przywara <andre.przywara@arm.com>,
	kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v4 7/8] arm64/sve: Leave SVE enabled on syscall if we don't context switch
Date: Mon, 14 Nov 2022 11:25:22 +0000	[thread overview]
Message-ID: <Y3IlonLu6MHlIzHm@sirena.org.uk> (raw)
In-Reply-To: <Y3IY9es/x1w8BZVL@arm.com>


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On Mon, Nov 14, 2022 at 10:31:17AM +0000, Catalin Marinas wrote:
> On Sat, Oct 22, 2022 at 12:03:20AM +0100, Mark Brown wrote:

> > The syscall ABI says that the SVE register state not shared with FPSIMD
> > may not be preserved on syscall, and this is the only mechanism we have
> > in the ABI to stop tracking the extra SVE state for a process. Currently
> > we do this unconditionally by means of disabling SVE for the process on
> > syscall, causing userspace to take a trap to EL1 if it uses SVE again.
> > These extra traps result in a noticeable overhead for using SVE instead
> > of FPSIMD in some workloads, especially for simple syscalls where we can
> > return directly to userspace and would not otherwise need to update the
> > floating point registers. Tests with fp-pidbench show an approximately
> > 70% overhead on a range of implementations when SVE is in use - while
> > this is an extreme and entirely artificial benchmark it is clear that
> > there is some useful room for improvement here.

> If SVE is no longer in use, does the explicit SVE regs flushing cause
> any noticeable overhead? I guess even if there's a small overhead, it's
> only temporary until a context switch clears TIF_SVE again.

The overhead of the flushes is measurable, IIRC it was about 2-3%
on fp-pidbench for vector lengths 256 bit and above which have
additional overhead due to needing to flush the V/Z registers.
OTOH that's an entirely artificial benchmark and as you say soon
as the task gets context switched it'll stop incurring that
overhead.  Given that the improvement we get in the case where
the task is continuing to use SVE is more than an order of
magnitude greater it seems like a sensible tradeoff.

> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>

Thanks.

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  reply	other threads:[~2022-11-14 11:26 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-21 23:03 [PATCH v4 0/8] arm64/sve: Clean up KVM integration and optimise syscalls Mark Brown
2022-10-21 23:03 ` [PATCH v4 1/8] KVM: arm64: Discard any SVE state when entering KVM guests Mark Brown
2022-11-13 22:00   ` Catalin Marinas
2022-10-21 23:03 ` [PATCH v4 2/8] arm64/fpsimd: Track the saved FPSIMD state type separately to TIF_SVE Mark Brown
2022-11-13 22:12   ` Catalin Marinas
2022-11-14 11:10     ` Mark Brown
2022-10-21 23:03 ` [PATCH v4 3/8] arm64/fpsimd: Have KVM explicitly say which FP registers to save Mark Brown
2022-11-13 22:27   ` Catalin Marinas
2022-10-21 23:03 ` [PATCH v4 4/8] arm64/fpsimd: Stop using TIF_SVE to manage register saving in KVM Mark Brown
2022-11-13 22:30   ` Catalin Marinas
2022-10-21 23:03 ` [PATCH v4 5/8] arm64/fpsimd: Load FP state based on recorded data type Mark Brown
2022-11-14  9:24   ` Catalin Marinas
2022-10-21 23:03 ` [PATCH v4 6/8] arm64/fpsimd: SME no longer requires SVE register state Mark Brown
2022-11-14 10:18   ` Catalin Marinas
2022-10-21 23:03 ` [PATCH v4 7/8] arm64/sve: Leave SVE enabled on syscall if we don't context switch Mark Brown
2022-11-14 10:31   ` Catalin Marinas
2022-11-14 11:25     ` Mark Brown [this message]
2022-10-21 23:03 ` [PATCH v4 8/8] arm64/fp: Use a struct to pass data to fpsimd_bind_state_to_cpu() Mark Brown
2022-11-14 10:33   ` Catalin Marinas

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