From: Sean Christopherson <seanjc@google.com>
To: Oliver Upton <oliver.upton@linux.dev>
Cc: Marc Zyngier <maz@kernel.org>, James Morse <james.morse@arm.com>,
Alexandru Elisei <alexandru.elisei@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev,
kvmarm@lists.cs.columbia.edu, linux-kernel@vger.kernel.org,
Reiji Watanabe <reijiw@google.com>
Subject: Re: [PATCH 2/2] KVM: arm64: selftests: Disable single-step without relying on ucall()
Date: Thu, 17 Nov 2022 22:32:53 +0000 [thread overview]
Message-ID: <Y3a2lfLLys4BtET3@google.com> (raw)
In-Reply-To: <Y3ZQ+fCobB4DOc+S@google.com>
On Thu, Nov 17, 2022, Sean Christopherson wrote:
> On Thu, Nov 17, 2022, Sean Christopherson wrote:
> > On Thu, Nov 17, 2022, Oliver Upton wrote:
> > > On Thu, Nov 17, 2022 at 12:23:50AM +0000, Sean Christopherson wrote:
> > > > Automatically disable single-step when the guest reaches the end of the
> > > > verified section instead of using an explicit ucall() to ask userspace to
> > > > disable single-step. An upcoming change to implement a pool-based scheme
> > > > for ucall() will add an atomic operation (bit test and set) in the guest
> > > > ucall code, and if the compiler generate "old school" atomics, e.g.
> > >
> > > Off topic, but I didn't ask when we were discussing this issue. What is
> > > the atomic used for in the pool-based ucall implementation?
> >
> > To avoid having to plumb an "id" into the guest, vCPUs grab a ucall entry from
> > the pool on a first-come first-serve basis, and then release the entry when the
> > ucall is complete. The current implementation is a bitmap, e.g. every possible
> > entry has a bit in the map, and vCPUs do an atomic bit-test-and-set to claim an
> > entry.
> >
> > Ugh. And there's a bug. Of course I notice it after sending the pull request.
> > Depsite being defined in atomic.h, and despite clear_bit() being atomic in the
> > kernel, tools' clear_bit() isn't actually atomic. Grr.
> >
> > Doesn't cause problems because there are so few multi-vCPU selftests, but that
> > needs to be fixed. Best thing would be to fix clear_bit() itself.
>
> Ha! And I bet when clear_bit() is fixed, this test will start failing again
> because the ucall() to activate single-step needs to release the entry _after_
> exiting to the host, i.e. single-step will be enabled across the atomic region
> again.
LOL, yep. Test gets stuck in __aarch64_ldclr8_sync().
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next prev parent reply other threads:[~2022-11-17 22:34 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-17 0:23 [PATCH 0/2] KVM: arm64: selftests: Fixes for single-step test Sean Christopherson
2022-11-17 0:23 ` [PATCH 1/2] KVM: arm64: selftests: Disable single-step with correct KVM define Sean Christopherson
2022-11-17 0:43 ` Oliver Upton
2022-11-17 3:07 ` Reiji Watanabe
2022-11-17 0:23 ` [PATCH 2/2] KVM: arm64: selftests: Disable single-step without relying on ucall() Sean Christopherson
2022-11-17 0:53 ` Oliver Upton
2022-11-17 1:20 ` Sean Christopherson
2022-11-17 15:19 ` Sean Christopherson
2022-11-17 22:32 ` Sean Christopherson [this message]
2022-11-17 7:07 ` Reiji Watanabe
2022-11-17 13:52 ` [PATCH 0/2] KVM: arm64: selftests: Fixes for single-step test Marc Zyngier
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