From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4A36CC4332F for ; Tue, 22 Nov 2022 03:18:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:CC:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=tZqTSVJtgGvfseoR51agra12NnmZlSdczOEgUik5qJk=; b=VOjoyN7GG6XHnw JB0Or+dumJGZQXVEN0pshq+YdDygwk4bzedVtOH8TE2xmmaORnlOjBXPywGP2bLNds5OukckiV3Ex rEn78Z2jqHKPlUIKdk1WNvPRftLXzDdDz6WqvapoSV4VIH+Wjfoz0gCYWjGcX0RhP05crZGYta9NM M0irZdbiBAEC1/svAgteLctG6Ph2UoJl1jfcoABlYfB8AoOlVzcWJh1nwi3uqLb6NiPFbXAQ4Y02c kfOyU698pkF9lxarwmDy8h3mUMuXZZ7voojG9TecUGCCI5A8GuygZhkYG1Bev2ym/b8pMFllQelcr eMYfdAlcPBLsTBU0jsLg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oxJmV-002zRV-UG; Tue, 22 Nov 2022 03:17:08 +0000 Received: from fllv0015.ext.ti.com ([198.47.19.141]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oxJmS-002zLw-FI for linux-arm-kernel@lists.infradead.org; Tue, 22 Nov 2022 03:17:06 +0000 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 2AM3Gmfk052000; Mon, 21 Nov 2022 21:16:48 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1669087008; bh=guqOIa3BGLWaQgOWnbj219Vgz3xRHgwkkF93hgdQXI0=; h=Date:From:To:CC:Subject:References:In-Reply-To; b=nyGkbMcgmnTl+H3zzs73Mi3L1L4luyx0kHWjSfJVsD4oGnw9dgQeX2o1Y2/EFqX+i 7pGBDOoiZUbTb++lyuFOxrGKbuDzzvhKxnkLErn4QmAcgYc5vTf7j0f3mxNdcjf5Hf sHakHy+9tG7OXn8aEl9nSWJYbRnXDdo4hhiNaGLg= Received: from DFLE114.ent.ti.com (dfle114.ent.ti.com [10.64.6.35]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 2AM3GmS5078101 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 21 Nov 2022 21:16:48 -0600 Received: from DFLE102.ent.ti.com (10.64.6.23) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16; Mon, 21 Nov 2022 21:16:48 -0600 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE102.ent.ti.com (10.64.6.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16 via Frontend Transport; Mon, 21 Nov 2022 21:16:48 -0600 Received: from ubuntu (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with SMTP id 2AM3GaT0109320; Mon, 21 Nov 2022 21:16:38 -0600 Date: Mon, 21 Nov 2022 19:16:35 -0800 From: Matt Ranostay To: Andrew Davis CC: , , , , , , , , , Subject: Re: [PATCH v6 3/8] arm64: dts: ti: k3-j721s2-mcu-wakeup: Add support of OSPI Message-ID: References: <20221119040906.9495-1-mranostay@ti.com> <20221119040906.9495-4-mranostay@ti.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221121_191704_902873_44807CB6 X-CRM114-Status: GOOD ( 18.52 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, Nov 21, 2022 at 10:53:03AM -0600, Andrew Davis wrote: > On 11/18/22 10:09 PM, Matt Ranostay wrote: > > From: Aswath Govindraju > > > > Add support for two instance of OSPI in J721S2 SoC. > > > > Signed-off-by: Aswath Govindraju > > Signed-off-by: Matt Ranostay > > --- > > .../boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi | 40 +++++++++++++++++++ > > 1 file changed, 40 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi > > index 0af242aa9816..46b3aab93c4b 100644 > > --- a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi > > +++ b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi > > @@ -306,4 +306,44 @@ cpts@3d000 { > > ti,cpts-periodic-outputs = <2>; > > }; > > }; > > + > > + fss: syscon@47000000 { > > + compatible = "ti,j721e-system-controller", "syscon", "simple-mfd"; > > This node is not the "ti,j721e-system-controller", and those don't have > SPI nodes in the binding, so this will have failed the dtbs_check anyway.. > > Should be just a "simple-bus". > > Andrew > Noted for next revision. Thanks, Matt > > + reg = <0x00 0x47000000 0x00 0x100>; > > + #address-cells = <2>; > > + #size-cells = <2>; > > + ranges; > > + > > + ospi0: spi@47040000 { > > + compatible = "ti,am654-ospi", "cdns,qspi-nor"; > > + reg = <0x00 0x47040000 0x00 0x100>, > > + <0x5 0x0000000 0x1 0x0000000>; > > + interrupts = ; > > + cdns,fifo-depth = <256>; > > + cdns,fifo-width = <4>; > > + cdns,trigger-address = <0x0>; > > + clocks = <&k3_clks 109 5>; > > + assigned-clocks = <&k3_clks 109 5>; > > + assigned-clock-parents = <&k3_clks 109 7>; > > + assigned-clock-rates = <166666666>; > > + power-domains = <&k3_pds 109 TI_SCI_PD_EXCLUSIVE>; > > + #address-cells = <1>; > > + #size-cells = <0>; > > + }; > > + > > + ospi1: spi@47050000 { > > + compatible = "ti,am654-ospi", "cdns,qspi-nor"; > > + reg = <0x00 0x47050000 0x00 0x100>, > > + <0x7 0x0000000 0x1 0x0000000>; > > + interrupts = ; > > + cdns,fifo-depth = <256>; > > + cdns,fifo-width = <4>; > > + cdns,trigger-address = <0x0>; > > + clocks = <&k3_clks 110 5>; > > + power-domains = <&k3_pds 110 TI_SCI_PD_EXCLUSIVE>; > > + #address-cells = <1>; > > + #size-cells = <0>; > > + }; > > + > > + }; > > }; _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel