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Sun, 04 Dec 2022 15:55:22 -0800 (PST) Date: Sun, 4 Dec 2022 15:55:19 -0800 From: Dmitry Torokhov To: Arnd Bergmann Cc: soc@kernel.org, Li Yang , Qiang Zhao , Greg Kroah-Hartman , Linus Walleij , Andy Shevchenko , linuxppc-dev@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org Subject: Re: [RESEND PATCH] soc: fsl: qe: request pins non-exclusively Message-ID: References: <81a7715b-559f-4c5c-bdb6-1aa00d409155@app.fastmail.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <81a7715b-559f-4c5c-bdb6-1aa00d409155@app.fastmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221204_155525_035892_E0365F26 X-CRM114-Status: GOOD ( 27.68 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Sun, Dec 04, 2022 at 01:10:19PM +0100, Arnd Bergmann wrote: > On Sun, Dec 4, 2022, at 05:50, Dmitry Torokhov wrote: > > > > SoC team, the problematic patch has been in next for a while and it > > would be great to get the fix in to make sure the driver is not broken > > in 6.2. Thanks! > > I have no problem taking thsi patch, but I get a merge conflict that > I'm not sure how to resolve: > > > @@@ -186,23 -182,27 +180,43 @@@ struct qe_pin *qe_pin_request(struct de > if (WARN_ON(!gc)) { > err = -ENODEV; > goto err0; > ++<<<<<<< HEAD > + } > + qe_pin->gpiod = gpiod; > + qe_pin->controller = gpiochip_get_data(gc); > + /* > + * FIXME: this gets the local offset on the gpio_chip so that the driver > + * can manipulate pin control settings through its custom API. The real > + * solution is to create a real pin control driver for this. > + */ > + qe_pin->num = gpio_chip_hwgpio(gpiod); > + > + if (!of_device_is_compatible(gc->of_node, "fsl,mpc8323-qe-pario-bank")) { > + pr_debug("%s: tried to get a non-qe pin\n", __func__); > + gpiod_put(gpiod); > ++======= > + } else if (!fwnode_device_is_compatible(gc->fwnode, > + "fsl,mpc8323-qe-pario-bank")) { > + dev_dbg(dev, "%s: tried to get a non-qe pin\n", __func__); > ++>>>>>>> soc: fsl: qe: request pins non-exclusively > err = -EINVAL; > - goto err0; > + } else { > + qe_pin->controller = gpiochip_get_data(gc); > + /* > + * FIXME: this gets the local offset on the gpio_chip so that > + * the driver can manipulate pin control settings through its > + * custom API. The real solution is to create a real pin control > + * driver for this. > + */ > + qe_pin->num = desc_to_gpio(gpiod) - gc->base; > } > > Could you rebase the patch on top of the soc/driver branch in the > soc tree and send the updated version? I see, it conflicts with: c9eb6e546a23 soc: fsl: qe: Switch to use fwnode instead of of_node that is in next but not in soc/driver tree/branch. OK, I'll rebase and I just noticed that I was leaking gpiod in case we could not locate gc (unlikely but still...). Thanks. -- Dmitry _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel