From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 89952C4708C for ; Mon, 5 Dec 2022 12:23:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=cuGXhsHZWUl64d/1eCiGIpi1GBWCX6aLjqvb0l8y21A=; b=zj7rZt+NzQnSvy 0tAcjvdlupccE+bzOAkJ19xzmkkeGbOO9rTRlaLb702CvVhgBsRc1PjxkbAWU8rzu4p9vNROt85Zc iRo6xFjGAmYmrS2Jy4ccGFgKr3CZsU67KMUNyeBrmqiny7BjBtW2FpaIj544Td+osMwE6lmq5x3wD 5TkWxOvDVnED4JVtlv6Jzz2Ud+jgOjUHXquLG3pOeBNv/X42m36rMSw3901AiQ6JUdJ/6/ZbJI4WS 3qevaOqTG9OPfrLUoQIfda+g2RjGbq1txAVvHbf7hHehEGC+bizN1WqPTfqa1ND2/7n9rmoJVkvUD aIYyN7mnQHmlzc+bHIsQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1p2AUl-002eHR-BY; Mon, 05 Dec 2022 12:22:51 +0000 Received: from mga01.intel.com ([192.55.52.88]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1p2AUi-002eBT-6t for linux-arm-kernel@lists.infradead.org; Mon, 05 Dec 2022 12:22:49 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1670242968; x=1701778968; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=lcxVp1A+yBTRM/AOTd0nAsYWpVQXLhD464zMr8HvkrY=; b=FxHzrZELXWAYJrgm692IKr4YRnhvRN6hTK7lvjQYW95FkDe48fT/2tzM b/aZWoqxFGH9sarrnzzU6IR61a9QuBvxtFXakf5D+ac2S6zW/vMdUlkzW 3phprRZffeQpFmYqy7zZdY0FDDZyBYO9EOtT4sXrxH4zAAt6YdIIvZcck Ira4AABMfveJVzY4zhqZaq6QZcW9FIg00VdjhLKcuZ/LScDp4bocoPEHe K/bZ4MjKvNQibZ+5dviJyJSyTRDK3zF3VjkcsHMXjVuWOwFN2d/SeGPl9 aeeRGRziHa60/k+01B80GULzFurXpVDQ5noKrAVm21tH+yq/ejiSxHca1 g==; X-IronPort-AV: E=McAfee;i="6500,9779,10551"; a="343327234" X-IronPort-AV: E=Sophos;i="5.96,219,1665471600"; d="scan'208";a="343327234" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Dec 2022 04:22:45 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10551"; a="639465380" X-IronPort-AV: E=Sophos;i="5.96,219,1665471600"; d="scan'208";a="639465380" Received: from smile.fi.intel.com ([10.237.72.54]) by orsmga007.jf.intel.com with ESMTP; 05 Dec 2022 04:22:42 -0800 Received: from andy by smile.fi.intel.com with local (Exim 4.96) (envelope-from ) id 1p2AUZ-004rjI-3D; Mon, 05 Dec 2022 14:22:40 +0200 Date: Mon, 5 Dec 2022 14:22:39 +0200 From: Andy Shevchenko To: Dmitry Torokhov Cc: Arnd Bergmann , soc@kernel.org, Li Yang , Qiang Zhao , Greg Kroah-Hartman , Linus Walleij , linuxppc-dev@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org Subject: Re: [RESEND PATCH] soc: fsl: qe: request pins non-exclusively Message-ID: References: <81a7715b-559f-4c5c-bdb6-1aa00d409155@app.fastmail.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221205_042248_289530_73299209 X-CRM114-Status: GOOD ( 33.22 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Sun, Dec 04, 2022 at 03:55:19PM -0800, Dmitry Torokhov wrote: > On Sun, Dec 04, 2022 at 01:10:19PM +0100, Arnd Bergmann wrote: > > On Sun, Dec 4, 2022, at 05:50, Dmitry Torokhov wrote: > > > > > > SoC team, the problematic patch has been in next for a while and it > > > would be great to get the fix in to make sure the driver is not broken > > > in 6.2. Thanks! > > > > I have no problem taking thsi patch, but I get a merge conflict that > > I'm not sure how to resolve: > > > > > > @@@ -186,23 -182,27 +180,43 @@@ struct qe_pin *qe_pin_request(struct de > > if (WARN_ON(!gc)) { > > err = -ENODEV; > > goto err0; > > ++<<<<<<< HEAD > > + } > > + qe_pin->gpiod = gpiod; > > + qe_pin->controller = gpiochip_get_data(gc); > > + /* > > + * FIXME: this gets the local offset on the gpio_chip so that the driver > > + * can manipulate pin control settings through its custom API. The real > > + * solution is to create a real pin control driver for this. > > + */ > > + qe_pin->num = gpio_chip_hwgpio(gpiod); > > + > > + if (!of_device_is_compatible(gc->of_node, "fsl,mpc8323-qe-pario-bank")) { > > + pr_debug("%s: tried to get a non-qe pin\n", __func__); > > + gpiod_put(gpiod); > > ++======= > > + } else if (!fwnode_device_is_compatible(gc->fwnode, > > + "fsl,mpc8323-qe-pario-bank")) { > > + dev_dbg(dev, "%s: tried to get a non-qe pin\n", __func__); > > ++>>>>>>> soc: fsl: qe: request pins non-exclusively > > err = -EINVAL; > > - goto err0; > > + } else { > > + qe_pin->controller = gpiochip_get_data(gc); > > + /* > > + * FIXME: this gets the local offset on the gpio_chip so that > > + * the driver can manipulate pin control settings through its > > + * custom API. The real solution is to create a real pin control > > + * driver for this. > > + */ > > + qe_pin->num = desc_to_gpio(gpiod) - gc->base; > > } > > > > Could you rebase the patch on top of the soc/driver branch in the > > soc tree and send the updated version? > > I see, it conflicts with: > > c9eb6e546a23 soc: fsl: qe: Switch to use fwnode instead of of_node > > that is in next but not in soc/driver tree/branch. That's due to no reaction on the patch [1] from Freescale maintainers (*). Either soc subsystem can pull this [2] or your patch can go via pin control subsystem. *) Note, there is not Arnd's name nor soc mailing list in the MAINTAINERS regarding those files, so I had had no idea about the correct route of the change. [1]: https://lore.kernel.org/lkml/20221005152947.71696-1-andriy.shevchenko@linux.intel.com/ [2]: https://lore.kernel.org/linux-gpio/Y3YY%2Fm0F%2FRh0jUc7@black.fi.intel.com/ -- With Best Regards, Andy Shevchenko _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel