From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CC7A1C433FE for ; Wed, 30 Nov 2022 14:17:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=9F4XGtbnAlSfmBz9Z7/VMl4EJe7MLRsBZosO5Y4K+LE=; b=WM4eZElODr3p0w D0L8gGyQ0z9VSVMuD/WoUAyOsR6nvg5iEctZmYFlVT7QbUMKXk7nH+5QtOIJ0y7Yj9+zB8S9YK6jM vUq1zzMhuoEuOvM+ePEVlZEKCJG3v5smVgHNO6jLugxRRPm8jRAU9eqqILti7nx35O05l/lxe1rp1 tHy9QhKJagOwvLxMBhDL6onyRPmOpnjEeKL1bjgpu6wiVvdOThVa9hPm/M7GNJOPtS2jebjm0xb6t MLHfq/uI0fqtQSPERCfJj6XLsUm69k4zkyV/wIPz75xT7MU2R20fcJ3yTAOt+JE3yWWFH3lFCWJHZ dY3eKYDLowzqAHAtVG/g==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1p0Nsb-00GnV1-Ah; Wed, 30 Nov 2022 14:16:05 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1p0NsX-00GnT2-78 for linux-arm-kernel@lists.infradead.org; Wed, 30 Nov 2022 14:16:03 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id EBD93D6E; Wed, 30 Nov 2022 06:16:04 -0800 (PST) Received: from FVFF77S0Q05N.cambridge.arm.com (FVFF77S0Q05N.cambridge.arm.com [10.1.39.165]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 4DDE93F73D; Wed, 30 Nov 2022 06:15:57 -0800 (PST) Date: Wed, 30 Nov 2022 14:15:54 +0000 From: Mark Rutland To: Ard Biesheuvel Cc: linux-arm-kernel@lists.infradead.org, Marc Zyngier , Will Deacon , Kees Cook , Catalin Marinas , Mark Brown Subject: Re: [PATCH 2/4] arm64: assembler: Add macros for return address protection Message-ID: References: <20221129141803.1746898-1-ardb@kernel.org> <20221129141803.1746898-3-ardb@kernel.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20221129141803.1746898-3-ardb@kernel.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221130_061601_396542_5000256F X-CRM114-Status: GOOD ( 31.22 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, Nov 29, 2022 at 03:18:01PM +0100, Ard Biesheuvel wrote: > When in-kernel pointer authentication is configured, emit PACIASP and > AUTIASP instructions as well as shadow call stack pushes and pops, > depending on the configuration. > > Note that dynamic shadow call stack makes this slightly tricky, as it > depends on in-kernel BTI as well. The resulting code will never contain > both PAC and shadow call stack operations, even if shadow call stack > support is not configured as dynamic. > > Signed-off-by: Ard Biesheuvel > --- > arch/arm64/include/asm/assembler.h | 81 ++++++++++++++++++++ > 1 file changed, 81 insertions(+) > > diff --git a/arch/arm64/include/asm/assembler.h b/arch/arm64/include/asm/assembler.h > index 3d1714a7eb6411ba..99d74c29ab3cbe05 100644 > --- a/arch/arm64/include/asm/assembler.h > +++ b/arch/arm64/include/asm/assembler.h > @@ -692,6 +692,85 @@ alternative_endif > #endif > .endm > > + /* > + * protect_return_address - protect the return address value in > + * register @reg, either by signing it using PAC and/or by storing it > + * on the shadow call stack. > + * > + * The sequence below emits a shadow call stack push if the feature is > + * enabled, and if in-kernel PAC is enabled as well, the instruction > + * will be patched into a PACIA instruction involving the same register > + * address (and SP as the modifier) if PAC is detected at runtime. > + * > + * If in-kernel BTI and dynamic shadow call stacks are also configured, > + * it becomes a bit more tricky, because then, shadow call stacks will > + * only be enabled on non-BTI hardware, regardless of the PAUTH state. > + * In that case, we emit one of the following sequences. > + * > + * PAC+BTI enabled No PAC or BTI BTI without PAC PAC without BTI > + * > + * B 0f NOP B 0f NOP > + * NOP SCS push SCS push NOP > + * 0: PACIA NOP NOP PACIA > + * > + * Note that, due to the code patching occuring at function entry and > + * exit, these macros must not be used in code that may execute before > + * the boot CPU feature based code patching has completed. I'm a bit worried about that, since there's some stuff like early ftrace that might set up some state before this runs. Is there no way we can have scs_patch() handle this the same as other PACIASP / AUTIASP sequences? That would mean we do all SCS patching in one go, so there's less risk of error, and we'd only require a single instruction rather than three. If we're happy doing this late, I think we could instead use a callback alternative to align with the regular SCS patching logic -- default to {PAC,AUT}IASP, and have the callback have the same checks as the SCS patching to determine when to patch with LDR/STR. Thanks, Mark. > + */ > + .macro protect_return_address, reg=x30 > +#ifdef CONFIG_ARM64_PTR_AUTH_KERNEL > +#if defined(CONFIG_DYNAMIC_SCS) && defined(CONFIG_ARM64_BTI_KERNEL) > +alternative_if ARM64_BTI > + b .L0_\@ > +alternative_else_nop_endif > +#endif > +alternative_if_not ARM64_HAS_ADDRESS_AUTH > +#endif > +#ifdef CONFIG_SHADOW_CALL_STACK > + str \reg, [x18], #8 > +#endif > +#ifdef CONFIG_ARM64_PTR_AUTH_KERNEL > +#if !defined(CONFIG_SHADOW_CALL_STACK) || \ > + (defined(CONFIG_DYNAMIC_SCS) && defined(CONFIG_ARM64_BTI_KERNEL)) > +.L0_\@: nop > +#endif > +alternative_else > +#if defined(CONFIG_DYNAMIC_SCS) && defined(CONFIG_ARM64_BTI_KERNEL) > + nop > +#endif > + .arch_extension pauth > + pacia \reg, sp > +alternative_endif > +#endif > + .endm > + > + /* > + * restore_return_address - restore the return address value in > + * register @reg, either by authenticating it using PAC and/or > + * reloading it from the shadow call stack. > + */ > + .macro restore_return_address, reg=x30 > +#ifdef CONFIG_ARM64_PTR_AUTH_KERNEL > +alternative_if ARM64_HAS_ADDRESS_AUTH > + .arch_extension pauth > + autia \reg, sp > +alternative_else_nop_endif > +#if defined(CONFIG_DYNAMIC_SCS) && defined(CONFIG_ARM64_BTI_KERNEL) > +alternative_if ARM64_BTI > + b .L0_\@ > +alternative_else_nop_endif > +#endif > +alternative_if_not ARM64_HAS_ADDRESS_AUTH > +#endif > +#ifdef CONFIG_SHADOW_CALL_STACK > + ldr \reg, [x18, #-8]! > +#endif > +#ifdef CONFIG_ARM64_PTR_AUTH_KERNEL > +alternative_else_nop_endif > +.L0_\@: > +#endif > + .endm > + > /* > * frame_push - Push @regcount callee saved registers to the stack, > * starting at x19, as well as x29/x30, and set x29 to > @@ -699,6 +778,7 @@ alternative_endif > * for locals. > */ > .macro frame_push, regcount:req, extra > + protect_return_address > __frame st, \regcount, \extra > .endm > > @@ -710,6 +790,7 @@ alternative_endif > */ > .macro frame_pop > __frame ld > + restore_return_address > .endm > > .macro __frame_regs, reg1, reg2, op, num > -- > 2.35.1 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel