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From: Mark Rutland <mark.rutland@arm.com>
To: Mark Brown <broonie@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	James Morse <james.morse@arm.com>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 6/6] arm64/cpufeature: Use helper macros to specify hwcaps
Date: Fri, 9 Dec 2022 12:51:09 +0000	[thread overview]
Message-ID: <Y5MvPRkBEfPfvRTi@FVFF77S0Q05N> (raw)
In-Reply-To: <20221207-arm64-sysreg-helpers-v1-6-149fa1308a23@kernel.org>

On Thu, Dec 08, 2022 at 04:03:27PM +0000, Mark Brown wrote:
> At present the hwcaps are hard to read and a bit error prone since the
> macros used to specify matches require us to write out the register name
> multiple times and explicitly specify the width of the field, hopefully
> using the correct constant. Now that all the ID registers are generated we
> can improve this somewhat by redoing the macros so that we specify the
> register, field and minimum value symbolically and use token pasting to
> initialise the capability struct with the appropriate values.
> 
> We move from specifying like this:
> 
>       HWCAP_CAP(SYS_ID_AA64PFR1_EL1, ID_AA64PFR1_EL1_BT_SHIFT, 4, FTR_UNSIGNED, ID_AA64PFR1_EL1_BT_IMP, CAP_HWCAP, KERNEL_HWCAP_BTI),
> 
> to this:
> 
>       HWCAP_CAP(ID_AA64PFR1_EL1, BT, IMP, CAP_HWCAP, KERNEL_HWCAP_BTI),

Nice! That's far more legibile, and less prone to error.

> which is shorter due to having less duplicate information and makes it
> much harder to make an error like specifying the wrong field width or
> an invalid enumeration value since everything must be a constant defined
> for the sysreg and names are only typed once.
> 
> Signed-off-by: Mark Brown <broonie@kernel.org>

FWIW:

Acked-by: Mark Rutland <mark.rutland@arm.com>

I have not verified each and every entry.

Mark.

> ---
>  arch/arm64/kernel/cpufeature.c | 181 ++++++++++++++++++++---------------------
>  1 file changed, 87 insertions(+), 94 deletions(-)
> 
> diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
> index b7c1b22e6cc0..98b097b194fa 100644
> --- a/arch/arm64/kernel/cpufeature.c
> +++ b/arch/arm64/kernel/cpufeature.c
> @@ -2686,13 +2686,13 @@ static const struct arm64_cpu_capabilities arm64_features[] = {
>  	{},
>  };
>  
> -#define HWCAP_CPUID_MATCH(reg, field, width, s, min_value)			\
> +#define HWCAP_CPUID_MATCH(reg, field, min_value)			\
>  		.matches = has_user_cpuid_feature,					\
> -		.sys_reg = reg,							\
> -		.field_pos = field,						\
> -		.field_width = width,						\
> -		.sign = s,							\
> -		.min_field_value = min_value,
> +		.sys_reg = SYS_##reg,							\
> +		.field_pos = reg##_##field##_SHIFT,						\
> +		.field_width = reg##_##field##_WIDTH,						\
> +		.sign = reg##_##field##_SIGN,							\
> +		.min_field_value = reg##_##field##_##min_value,
>  
>  #define __HWCAP_CAP(name, cap_type, cap)					\
>  		.desc = name,							\
> @@ -2700,10 +2700,10 @@ static const struct arm64_cpu_capabilities arm64_features[] = {
>  		.hwcap_type = cap_type,						\
>  		.hwcap = cap,							\
>  
> -#define HWCAP_CAP(reg, field, width, s, min_value, cap_type, cap)		\
> +#define HWCAP_CAP(reg, field, min_value, cap_type, cap)		\
>  	{									\
>  		__HWCAP_CAP(#cap, cap_type, cap)				\
> -		HWCAP_CPUID_MATCH(reg, field, width, s, min_value) 		\
> +		HWCAP_CPUID_MATCH(reg, field, min_value) 		\
>  	}
>  
>  #define HWCAP_MULTI_CAP(list, cap_type, cap)					\
> @@ -2722,115 +2722,108 @@ static const struct arm64_cpu_capabilities arm64_features[] = {
>  #ifdef CONFIG_ARM64_PTR_AUTH
>  static const struct arm64_cpu_capabilities ptr_auth_hwcap_addr_matches[] = {
>  	{
> -		HWCAP_CPUID_MATCH(SYS_ID_AA64ISAR1_EL1, ID_AA64ISAR1_EL1_APA_SHIFT,
> -				  4, FTR_UNSIGNED,
> -				  ID_AA64ISAR1_EL1_APA_PAuth)
> +		HWCAP_CPUID_MATCH(ID_AA64ISAR1_EL1, APA, PAuth)
>  	},
>  	{
> -		HWCAP_CPUID_MATCH(SYS_ID_AA64ISAR2_EL1, ID_AA64ISAR2_EL1_APA3_SHIFT,
> -				  4, FTR_UNSIGNED, ID_AA64ISAR2_EL1_APA3_PAuth)
> +		HWCAP_CPUID_MATCH(ID_AA64ISAR2_EL1, APA3, PAuth)
>  	},
>  	{
> -		HWCAP_CPUID_MATCH(SYS_ID_AA64ISAR1_EL1, ID_AA64ISAR1_EL1_API_SHIFT,
> -				  4, FTR_UNSIGNED, ID_AA64ISAR1_EL1_API_PAuth)
> +		HWCAP_CPUID_MATCH(ID_AA64ISAR1_EL1, API, PAuth)
>  	},
>  	{},
>  };
>  
>  static const struct arm64_cpu_capabilities ptr_auth_hwcap_gen_matches[] = {
>  	{
> -		HWCAP_CPUID_MATCH(SYS_ID_AA64ISAR1_EL1, ID_AA64ISAR1_EL1_GPA_SHIFT,
> -				  4, FTR_UNSIGNED, ID_AA64ISAR1_EL1_GPA_IMP)
> +		HWCAP_CPUID_MATCH(ID_AA64ISAR1_EL1, GPA, IMP)
>  	},
>  	{
> -		HWCAP_CPUID_MATCH(SYS_ID_AA64ISAR2_EL1, ID_AA64ISAR2_EL1_GPA3_SHIFT,
> -				  4, FTR_UNSIGNED, ID_AA64ISAR2_EL1_GPA3_IMP)
> +		HWCAP_CPUID_MATCH(ID_AA64ISAR2_EL1, GPA3, IMP)
>  	},
>  	{
> -		HWCAP_CPUID_MATCH(SYS_ID_AA64ISAR1_EL1, ID_AA64ISAR1_EL1_GPI_SHIFT,
> -				  4, FTR_UNSIGNED, ID_AA64ISAR1_EL1_GPI_IMP)
> +		HWCAP_CPUID_MATCH(ID_AA64ISAR1_EL1, GPI, IMP)
>  	},
>  	{},
>  };
>  #endif
>  
>  static const struct arm64_cpu_capabilities arm64_elf_hwcaps[] = {
> -	HWCAP_CAP(SYS_ID_AA64ISAR0_EL1, ID_AA64ISAR0_EL1_AES_SHIFT, 4, FTR_UNSIGNED, ID_AA64ISAR0_EL1_AES_PMULL, CAP_HWCAP, KERNEL_HWCAP_PMULL),
> -	HWCAP_CAP(SYS_ID_AA64ISAR0_EL1, ID_AA64ISAR0_EL1_AES_SHIFT, 4, FTR_UNSIGNED, ID_AA64ISAR0_EL1_AES_AES, CAP_HWCAP, KERNEL_HWCAP_AES),
> -	HWCAP_CAP(SYS_ID_AA64ISAR0_EL1, ID_AA64ISAR0_EL1_SHA1_SHIFT, 4, FTR_UNSIGNED, ID_AA64ISAR0_EL1_SHA1_IMP, CAP_HWCAP, KERNEL_HWCAP_SHA1),
> -	HWCAP_CAP(SYS_ID_AA64ISAR0_EL1, ID_AA64ISAR0_EL1_SHA2_SHIFT, 4, FTR_UNSIGNED, ID_AA64ISAR0_EL1_SHA2_SHA256, CAP_HWCAP, KERNEL_HWCAP_SHA2),
> -	HWCAP_CAP(SYS_ID_AA64ISAR0_EL1, ID_AA64ISAR0_EL1_SHA2_SHIFT, 4, FTR_UNSIGNED, ID_AA64ISAR0_EL1_SHA2_SHA512, CAP_HWCAP, KERNEL_HWCAP_SHA512),
> -	HWCAP_CAP(SYS_ID_AA64ISAR0_EL1, ID_AA64ISAR0_EL1_CRC32_SHIFT, 4, FTR_UNSIGNED, ID_AA64ISAR0_EL1_CRC32_IMP, CAP_HWCAP, KERNEL_HWCAP_CRC32),
> -	HWCAP_CAP(SYS_ID_AA64ISAR0_EL1, ID_AA64ISAR0_EL1_ATOMIC_SHIFT, 4, FTR_UNSIGNED, ID_AA64ISAR0_EL1_ATOMIC_IMP, CAP_HWCAP, KERNEL_HWCAP_ATOMICS),
> -	HWCAP_CAP(SYS_ID_AA64ISAR0_EL1, ID_AA64ISAR0_EL1_RDM_SHIFT, 4, FTR_UNSIGNED, ID_AA64ISAR0_EL1_RDM_IMP, CAP_HWCAP, KERNEL_HWCAP_ASIMDRDM),
> -	HWCAP_CAP(SYS_ID_AA64ISAR0_EL1, ID_AA64ISAR0_EL1_SHA3_SHIFT, 4, FTR_UNSIGNED, ID_AA64ISAR0_EL1_SHA3_IMP, CAP_HWCAP, KERNEL_HWCAP_SHA3),
> -	HWCAP_CAP(SYS_ID_AA64ISAR0_EL1, ID_AA64ISAR0_EL1_SM3_SHIFT, 4, FTR_UNSIGNED, ID_AA64ISAR0_EL1_SM3_IMP, CAP_HWCAP, KERNEL_HWCAP_SM3),
> -	HWCAP_CAP(SYS_ID_AA64ISAR0_EL1, ID_AA64ISAR0_EL1_SM4_SHIFT, 4, FTR_UNSIGNED, ID_AA64ISAR0_EL1_SM4_IMP, CAP_HWCAP, KERNEL_HWCAP_SM4),
> -	HWCAP_CAP(SYS_ID_AA64ISAR0_EL1, ID_AA64ISAR0_EL1_DP_SHIFT, 4, FTR_UNSIGNED, ID_AA64ISAR0_EL1_DP_IMP, CAP_HWCAP, KERNEL_HWCAP_ASIMDDP),
> -	HWCAP_CAP(SYS_ID_AA64ISAR0_EL1, ID_AA64ISAR0_EL1_FHM_SHIFT, 4, FTR_UNSIGNED, ID_AA64ISAR0_EL1_FHM_IMP, CAP_HWCAP, KERNEL_HWCAP_ASIMDFHM),
> -	HWCAP_CAP(SYS_ID_AA64ISAR0_EL1, ID_AA64ISAR0_EL1_TS_SHIFT, 4, FTR_UNSIGNED, ID_AA64ISAR0_EL1_TS_FLAGM, CAP_HWCAP, KERNEL_HWCAP_FLAGM),
> -	HWCAP_CAP(SYS_ID_AA64ISAR0_EL1, ID_AA64ISAR0_EL1_TS_SHIFT, 4, FTR_UNSIGNED, ID_AA64ISAR0_EL1_TS_FLAGM2, CAP_HWCAP, KERNEL_HWCAP_FLAGM2),
> -	HWCAP_CAP(SYS_ID_AA64ISAR0_EL1, ID_AA64ISAR0_EL1_RNDR_SHIFT, 4, FTR_UNSIGNED, ID_AA64ISAR0_EL1_RNDR_IMP, CAP_HWCAP, KERNEL_HWCAP_RNG),
> -	HWCAP_CAP(SYS_ID_AA64PFR0_EL1, ID_AA64PFR0_EL1_FP_SHIFT, 4, FTR_SIGNED, ID_AA64PFR0_EL1_FP_IMP, CAP_HWCAP, KERNEL_HWCAP_FP),
> -	HWCAP_CAP(SYS_ID_AA64PFR0_EL1, ID_AA64PFR0_EL1_FP_SHIFT, 4, FTR_SIGNED, ID_AA64PFR0_EL1_FP_FP16, CAP_HWCAP, KERNEL_HWCAP_FPHP),
> -	HWCAP_CAP(SYS_ID_AA64PFR0_EL1, ID_AA64PFR0_EL1_AdvSIMD_SHIFT, 4, FTR_SIGNED, ID_AA64PFR0_EL1_AdvSIMD_IMP, CAP_HWCAP, KERNEL_HWCAP_ASIMD),
> -	HWCAP_CAP(SYS_ID_AA64PFR0_EL1, ID_AA64PFR0_EL1_AdvSIMD_SHIFT, 4, FTR_SIGNED, ID_AA64PFR0_EL1_AdvSIMD_FP16, CAP_HWCAP, KERNEL_HWCAP_ASIMDHP),
> -	HWCAP_CAP(SYS_ID_AA64PFR0_EL1, ID_AA64PFR0_EL1_DIT_SHIFT, 4, FTR_UNSIGNED, ID_AA64PFR0_EL1_DIT_IMP, CAP_HWCAP, KERNEL_HWCAP_DIT),
> -	HWCAP_CAP(SYS_ID_AA64ISAR1_EL1, ID_AA64ISAR1_EL1_DPB_SHIFT, 4, FTR_UNSIGNED, ID_AA64ISAR1_EL1_DPB_IMP, CAP_HWCAP, KERNEL_HWCAP_DCPOP),
> -	HWCAP_CAP(SYS_ID_AA64ISAR1_EL1, ID_AA64ISAR1_EL1_DPB_SHIFT, 4, FTR_UNSIGNED, ID_AA64ISAR1_EL1_DPB_DPB2, CAP_HWCAP, KERNEL_HWCAP_DCPODP),
> -	HWCAP_CAP(SYS_ID_AA64ISAR1_EL1, ID_AA64ISAR1_EL1_JSCVT_SHIFT, 4, FTR_UNSIGNED, ID_AA64ISAR1_EL1_JSCVT_IMP, CAP_HWCAP, KERNEL_HWCAP_JSCVT),
> -	HWCAP_CAP(SYS_ID_AA64ISAR1_EL1, ID_AA64ISAR1_EL1_FCMA_SHIFT, 4, FTR_UNSIGNED, ID_AA64ISAR1_EL1_FCMA_IMP, CAP_HWCAP, KERNEL_HWCAP_FCMA),
> -	HWCAP_CAP(SYS_ID_AA64ISAR1_EL1, ID_AA64ISAR1_EL1_LRCPC_SHIFT, 4, FTR_UNSIGNED, ID_AA64ISAR1_EL1_LRCPC_IMP, CAP_HWCAP, KERNEL_HWCAP_LRCPC),
> -	HWCAP_CAP(SYS_ID_AA64ISAR1_EL1, ID_AA64ISAR1_EL1_LRCPC_SHIFT, 4, FTR_UNSIGNED, ID_AA64ISAR1_EL1_LRCPC_LRCPC2, CAP_HWCAP, KERNEL_HWCAP_ILRCPC),
> -	HWCAP_CAP(SYS_ID_AA64ISAR1_EL1, ID_AA64ISAR1_EL1_FRINTTS_SHIFT, 4, FTR_UNSIGNED, ID_AA64ISAR1_EL1_FRINTTS_IMP, CAP_HWCAP, KERNEL_HWCAP_FRINT),
> -	HWCAP_CAP(SYS_ID_AA64ISAR1_EL1, ID_AA64ISAR1_EL1_SB_SHIFT, 4, FTR_UNSIGNED, ID_AA64ISAR1_EL1_SB_IMP, CAP_HWCAP, KERNEL_HWCAP_SB),
> -	HWCAP_CAP(SYS_ID_AA64ISAR1_EL1, ID_AA64ISAR1_EL1_BF16_SHIFT, 4, FTR_UNSIGNED, ID_AA64ISAR1_EL1_BF16_IMP, CAP_HWCAP, KERNEL_HWCAP_BF16),
> -	HWCAP_CAP(SYS_ID_AA64ISAR1_EL1, ID_AA64ISAR1_EL1_BF16_SHIFT, 4, FTR_UNSIGNED, ID_AA64ISAR1_EL1_BF16_EBF16, CAP_HWCAP, KERNEL_HWCAP_EBF16),
> -	HWCAP_CAP(SYS_ID_AA64ISAR1_EL1, ID_AA64ISAR1_EL1_DGH_SHIFT, 4, FTR_UNSIGNED, ID_AA64ISAR1_EL1_DGH_IMP, CAP_HWCAP, KERNEL_HWCAP_DGH),
> -	HWCAP_CAP(SYS_ID_AA64ISAR1_EL1, ID_AA64ISAR1_EL1_I8MM_SHIFT, 4, FTR_UNSIGNED, ID_AA64ISAR1_EL1_I8MM_IMP, CAP_HWCAP, KERNEL_HWCAP_I8MM),
> -	HWCAP_CAP(SYS_ID_AA64MMFR2_EL1, ID_AA64MMFR2_EL1_AT_SHIFT, 4, FTR_UNSIGNED, ID_AA64MMFR2_EL1_AT_IMP, CAP_HWCAP, KERNEL_HWCAP_USCAT),
> +	HWCAP_CAP(ID_AA64ISAR0_EL1, AES, PMULL, CAP_HWCAP, KERNEL_HWCAP_PMULL),
> +	HWCAP_CAP(ID_AA64ISAR0_EL1, AES, AES, CAP_HWCAP, KERNEL_HWCAP_AES),
> +	HWCAP_CAP(ID_AA64ISAR0_EL1, SHA1, IMP, CAP_HWCAP, KERNEL_HWCAP_SHA1),
> +	HWCAP_CAP(ID_AA64ISAR0_EL1, SHA2, SHA256, CAP_HWCAP, KERNEL_HWCAP_SHA2),
> +	HWCAP_CAP(ID_AA64ISAR0_EL1, SHA2, SHA512, CAP_HWCAP, KERNEL_HWCAP_SHA512),
> +	HWCAP_CAP(ID_AA64ISAR0_EL1, CRC32, IMP, CAP_HWCAP, KERNEL_HWCAP_CRC32),
> +	HWCAP_CAP(ID_AA64ISAR0_EL1, ATOMIC, IMP, CAP_HWCAP, KERNEL_HWCAP_ATOMICS),
> +	HWCAP_CAP(ID_AA64ISAR0_EL1, RDM, IMP, CAP_HWCAP, KERNEL_HWCAP_ASIMDRDM),
> +	HWCAP_CAP(ID_AA64ISAR0_EL1, SHA3, IMP, CAP_HWCAP, KERNEL_HWCAP_SHA3),
> +	HWCAP_CAP(ID_AA64ISAR0_EL1, SM3, IMP, CAP_HWCAP, KERNEL_HWCAP_SM3),
> +	HWCAP_CAP(ID_AA64ISAR0_EL1, SM4, IMP, CAP_HWCAP, KERNEL_HWCAP_SM4),
> +	HWCAP_CAP(ID_AA64ISAR0_EL1, DP, IMP, CAP_HWCAP, KERNEL_HWCAP_ASIMDDP),
> +	HWCAP_CAP(ID_AA64ISAR0_EL1, FHM, IMP, CAP_HWCAP, KERNEL_HWCAP_ASIMDFHM),
> +	HWCAP_CAP(ID_AA64ISAR0_EL1, TS, FLAGM, CAP_HWCAP, KERNEL_HWCAP_FLAGM),
> +	HWCAP_CAP(ID_AA64ISAR0_EL1, TS, FLAGM2, CAP_HWCAP, KERNEL_HWCAP_FLAGM2),
> +	HWCAP_CAP(ID_AA64ISAR0_EL1, RNDR, IMP, CAP_HWCAP, KERNEL_HWCAP_RNG),
> +	HWCAP_CAP(ID_AA64PFR0_EL1, FP, IMP, CAP_HWCAP, KERNEL_HWCAP_FP),
> +	HWCAP_CAP(ID_AA64PFR0_EL1, FP, FP16, CAP_HWCAP, KERNEL_HWCAP_FPHP),
> +	HWCAP_CAP(ID_AA64PFR0_EL1, AdvSIMD, IMP, CAP_HWCAP, KERNEL_HWCAP_ASIMD),
> +	HWCAP_CAP(ID_AA64PFR0_EL1, AdvSIMD, FP16, CAP_HWCAP, KERNEL_HWCAP_ASIMDHP),
> +	HWCAP_CAP(ID_AA64PFR0_EL1, DIT, IMP, CAP_HWCAP, KERNEL_HWCAP_DIT),
> +	HWCAP_CAP(ID_AA64ISAR1_EL1, DPB, IMP, CAP_HWCAP, KERNEL_HWCAP_DCPOP),
> +	HWCAP_CAP(ID_AA64ISAR1_EL1, DPB, DPB2, CAP_HWCAP, KERNEL_HWCAP_DCPODP),
> +	HWCAP_CAP(ID_AA64ISAR1_EL1, JSCVT, IMP, CAP_HWCAP, KERNEL_HWCAP_JSCVT),
> +	HWCAP_CAP(ID_AA64ISAR1_EL1, FCMA, IMP, CAP_HWCAP, KERNEL_HWCAP_FCMA),
> +	HWCAP_CAP(ID_AA64ISAR1_EL1, LRCPC, IMP, CAP_HWCAP, KERNEL_HWCAP_LRCPC),
> +	HWCAP_CAP(ID_AA64ISAR1_EL1, LRCPC, LRCPC2, CAP_HWCAP, KERNEL_HWCAP_ILRCPC),
> +	HWCAP_CAP(ID_AA64ISAR1_EL1, FRINTTS, IMP, CAP_HWCAP, KERNEL_HWCAP_FRINT),
> +	HWCAP_CAP(ID_AA64ISAR1_EL1, SB, IMP, CAP_HWCAP, KERNEL_HWCAP_SB),
> +	HWCAP_CAP(ID_AA64ISAR1_EL1, BF16, IMP, CAP_HWCAP, KERNEL_HWCAP_BF16),
> +	HWCAP_CAP(ID_AA64ISAR1_EL1, BF16, EBF16, CAP_HWCAP, KERNEL_HWCAP_EBF16),
> +	HWCAP_CAP(ID_AA64ISAR1_EL1, DGH, IMP, CAP_HWCAP, KERNEL_HWCAP_DGH),
> +	HWCAP_CAP(ID_AA64ISAR1_EL1, I8MM, IMP, CAP_HWCAP, KERNEL_HWCAP_I8MM),
> +	HWCAP_CAP(ID_AA64MMFR2_EL1, AT, IMP, CAP_HWCAP, KERNEL_HWCAP_USCAT),
>  #ifdef CONFIG_ARM64_SVE
> -	HWCAP_CAP(SYS_ID_AA64PFR0_EL1, ID_AA64PFR0_EL1_SVE_SHIFT, 4, FTR_UNSIGNED, ID_AA64PFR0_EL1_SVE_IMP, CAP_HWCAP, KERNEL_HWCAP_SVE),
> -	HWCAP_CAP(SYS_ID_AA64ZFR0_EL1, ID_AA64ZFR0_EL1_SVEver_SHIFT, 4, FTR_UNSIGNED, ID_AA64ZFR0_EL1_SVEver_SVE2p1, CAP_HWCAP, KERNEL_HWCAP_SVE2P1),
> -	HWCAP_CAP(SYS_ID_AA64ZFR0_EL1, ID_AA64ZFR0_EL1_SVEver_SHIFT, 4, FTR_UNSIGNED, ID_AA64ZFR0_EL1_SVEver_SVE2, CAP_HWCAP, KERNEL_HWCAP_SVE2),
> -	HWCAP_CAP(SYS_ID_AA64ZFR0_EL1, ID_AA64ZFR0_EL1_AES_SHIFT, 4, FTR_UNSIGNED, ID_AA64ZFR0_EL1_AES_IMP, CAP_HWCAP, KERNEL_HWCAP_SVEAES),
> -	HWCAP_CAP(SYS_ID_AA64ZFR0_EL1, ID_AA64ZFR0_EL1_AES_SHIFT, 4, FTR_UNSIGNED, ID_AA64ZFR0_EL1_AES_PMULL128, CAP_HWCAP, KERNEL_HWCAP_SVEPMULL),
> -	HWCAP_CAP(SYS_ID_AA64ZFR0_EL1, ID_AA64ZFR0_EL1_BitPerm_SHIFT, 4, FTR_UNSIGNED, ID_AA64ZFR0_EL1_BitPerm_IMP, CAP_HWCAP, KERNEL_HWCAP_SVEBITPERM),
> -	HWCAP_CAP(SYS_ID_AA64ZFR0_EL1, ID_AA64ZFR0_EL1_BF16_SHIFT, 4, FTR_UNSIGNED, ID_AA64ZFR0_EL1_BF16_IMP, CAP_HWCAP, KERNEL_HWCAP_SVEBF16),
> -	HWCAP_CAP(SYS_ID_AA64ZFR0_EL1, ID_AA64ZFR0_EL1_BF16_SHIFT, 4, FTR_UNSIGNED, ID_AA64ZFR0_EL1_BF16_EBF16, CAP_HWCAP, KERNEL_HWCAP_SVE_EBF16),
> -	HWCAP_CAP(SYS_ID_AA64ZFR0_EL1, ID_AA64ZFR0_EL1_SHA3_SHIFT, 4, FTR_UNSIGNED, ID_AA64ZFR0_EL1_SHA3_IMP, CAP_HWCAP, KERNEL_HWCAP_SVESHA3),
> -	HWCAP_CAP(SYS_ID_AA64ZFR0_EL1, ID_AA64ZFR0_EL1_SM4_SHIFT, 4, FTR_UNSIGNED, ID_AA64ZFR0_EL1_SM4_IMP, CAP_HWCAP, KERNEL_HWCAP_SVESM4),
> -	HWCAP_CAP(SYS_ID_AA64ZFR0_EL1, ID_AA64ZFR0_EL1_I8MM_SHIFT, 4, FTR_UNSIGNED, ID_AA64ZFR0_EL1_I8MM_IMP, CAP_HWCAP, KERNEL_HWCAP_SVEI8MM),
> -	HWCAP_CAP(SYS_ID_AA64ZFR0_EL1, ID_AA64ZFR0_EL1_F32MM_SHIFT, 4, FTR_UNSIGNED, ID_AA64ZFR0_EL1_F32MM_IMP, CAP_HWCAP, KERNEL_HWCAP_SVEF32MM),
> -	HWCAP_CAP(SYS_ID_AA64ZFR0_EL1, ID_AA64ZFR0_EL1_F64MM_SHIFT, 4, FTR_UNSIGNED, ID_AA64ZFR0_EL1_F64MM_IMP, CAP_HWCAP, KERNEL_HWCAP_SVEF64MM),
> +	HWCAP_CAP(ID_AA64PFR0_EL1, SVE, IMP, CAP_HWCAP, KERNEL_HWCAP_SVE),
> +	HWCAP_CAP(ID_AA64ZFR0_EL1, SVEver, SVE2p1, CAP_HWCAP, KERNEL_HWCAP_SVE2P1),
> +	HWCAP_CAP(ID_AA64ZFR0_EL1, SVEver, SVE2, CAP_HWCAP, KERNEL_HWCAP_SVE2),
> +	HWCAP_CAP(ID_AA64ZFR0_EL1, AES, IMP, CAP_HWCAP, KERNEL_HWCAP_SVEAES),
> +	HWCAP_CAP(ID_AA64ZFR0_EL1, AES, PMULL128, CAP_HWCAP, KERNEL_HWCAP_SVEPMULL),
> +	HWCAP_CAP(ID_AA64ZFR0_EL1, BitPerm, IMP, CAP_HWCAP, KERNEL_HWCAP_SVEBITPERM),
> +	HWCAP_CAP(ID_AA64ZFR0_EL1, BF16, IMP, CAP_HWCAP, KERNEL_HWCAP_SVEBF16),
> +	HWCAP_CAP(ID_AA64ZFR0_EL1, BF16, EBF16, CAP_HWCAP, KERNEL_HWCAP_SVE_EBF16),
> +	HWCAP_CAP(ID_AA64ZFR0_EL1, SHA3, IMP, CAP_HWCAP, KERNEL_HWCAP_SVESHA3),
> +	HWCAP_CAP(ID_AA64ZFR0_EL1, SM4, IMP, CAP_HWCAP, KERNEL_HWCAP_SVESM4),
> +	HWCAP_CAP(ID_AA64ZFR0_EL1, I8MM, IMP, CAP_HWCAP, KERNEL_HWCAP_SVEI8MM),
> +	HWCAP_CAP(ID_AA64ZFR0_EL1, F32MM, IMP, CAP_HWCAP, KERNEL_HWCAP_SVEF32MM),
> +	HWCAP_CAP(ID_AA64ZFR0_EL1, F64MM, IMP, CAP_HWCAP, KERNEL_HWCAP_SVEF64MM),
>  #endif
> -	HWCAP_CAP(SYS_ID_AA64PFR1_EL1, ID_AA64PFR1_EL1_SSBS_SHIFT, 4, FTR_UNSIGNED, ID_AA64PFR1_EL1_SSBS_SSBS2, CAP_HWCAP, KERNEL_HWCAP_SSBS),
> +	HWCAP_CAP(ID_AA64PFR1_EL1, SSBS, SSBS2, CAP_HWCAP, KERNEL_HWCAP_SSBS),
>  #ifdef CONFIG_ARM64_BTI
> -	HWCAP_CAP(SYS_ID_AA64PFR1_EL1, ID_AA64PFR1_EL1_BT_SHIFT, 4, FTR_UNSIGNED, ID_AA64PFR1_EL1_BT_IMP, CAP_HWCAP, KERNEL_HWCAP_BTI),
> +	HWCAP_CAP(ID_AA64PFR1_EL1, BT, IMP, CAP_HWCAP, KERNEL_HWCAP_BTI),
>  #endif
>  #ifdef CONFIG_ARM64_PTR_AUTH
>  	HWCAP_MULTI_CAP(ptr_auth_hwcap_addr_matches, CAP_HWCAP, KERNEL_HWCAP_PACA),
>  	HWCAP_MULTI_CAP(ptr_auth_hwcap_gen_matches, CAP_HWCAP, KERNEL_HWCAP_PACG),
>  #endif
>  #ifdef CONFIG_ARM64_MTE
> -	HWCAP_CAP(SYS_ID_AA64PFR1_EL1, ID_AA64PFR1_EL1_MTE_SHIFT, 4, FTR_UNSIGNED, ID_AA64PFR1_EL1_MTE_MTE2, CAP_HWCAP, KERNEL_HWCAP_MTE),
> -	HWCAP_CAP(SYS_ID_AA64PFR1_EL1, ID_AA64PFR1_EL1_MTE_SHIFT, 4, FTR_UNSIGNED, ID_AA64PFR1_EL1_MTE_MTE3, CAP_HWCAP, KERNEL_HWCAP_MTE3),
> +	HWCAP_CAP(ID_AA64PFR1_EL1, MTE, MTE2, CAP_HWCAP, KERNEL_HWCAP_MTE),
> +	HWCAP_CAP(ID_AA64PFR1_EL1, MTE, MTE3, CAP_HWCAP, KERNEL_HWCAP_MTE3),
>  #endif /* CONFIG_ARM64_MTE */
> -	HWCAP_CAP(SYS_ID_AA64MMFR0_EL1, ID_AA64MMFR0_EL1_ECV_SHIFT, 4, FTR_UNSIGNED, ID_AA64MMFR0_EL1_ECV_IMP, CAP_HWCAP, KERNEL_HWCAP_ECV),
> -	HWCAP_CAP(SYS_ID_AA64MMFR1_EL1, ID_AA64MMFR1_EL1_AFP_SHIFT, 4, FTR_UNSIGNED, ID_AA64MMFR1_EL1_AFP_IMP, CAP_HWCAP, KERNEL_HWCAP_AFP),
> -	HWCAP_CAP(SYS_ID_AA64ISAR2_EL1, ID_AA64ISAR2_EL1_CSSC_SHIFT, 4, FTR_UNSIGNED, ID_AA64ISAR2_EL1_CSSC_IMP, CAP_HWCAP, KERNEL_HWCAP_CSSC),
> -	HWCAP_CAP(SYS_ID_AA64ISAR2_EL1, ID_AA64ISAR2_EL1_RPRFM_SHIFT, 4, FTR_UNSIGNED, ID_AA64ISAR2_EL1_RPRFM_IMP, CAP_HWCAP, KERNEL_HWCAP_RPRFM),
> -	HWCAP_CAP(SYS_ID_AA64ISAR2_EL1, ID_AA64ISAR2_EL1_RPRES_SHIFT, 4, FTR_UNSIGNED, ID_AA64ISAR2_EL1_RPRES_IMP, CAP_HWCAP, KERNEL_HWCAP_RPRES),
> -	HWCAP_CAP(SYS_ID_AA64ISAR2_EL1, ID_AA64ISAR2_EL1_WFxT_SHIFT, 4, FTR_UNSIGNED, ID_AA64ISAR2_EL1_WFxT_IMP, CAP_HWCAP, KERNEL_HWCAP_WFXT),
> +	HWCAP_CAP(ID_AA64MMFR0_EL1, ECV, IMP, CAP_HWCAP, KERNEL_HWCAP_ECV),
> +	HWCAP_CAP(ID_AA64MMFR1_EL1, AFP, IMP, CAP_HWCAP, KERNEL_HWCAP_AFP),
> +	HWCAP_CAP(ID_AA64ISAR2_EL1, CSSC, IMP, CAP_HWCAP, KERNEL_HWCAP_CSSC),
> +	HWCAP_CAP(ID_AA64ISAR2_EL1, RPRFM, IMP, CAP_HWCAP, KERNEL_HWCAP_RPRFM),
> +	HWCAP_CAP(ID_AA64ISAR2_EL1, RPRES, IMP, CAP_HWCAP, KERNEL_HWCAP_RPRES),
> +	HWCAP_CAP(ID_AA64ISAR2_EL1, WFxT, IMP, CAP_HWCAP, KERNEL_HWCAP_WFXT),
>  #ifdef CONFIG_ARM64_SME
> -	HWCAP_CAP(SYS_ID_AA64PFR1_EL1, ID_AA64PFR1_EL1_SME_SHIFT, 4, FTR_UNSIGNED, ID_AA64PFR1_EL1_SME_IMP, CAP_HWCAP, KERNEL_HWCAP_SME),
> -	HWCAP_CAP(SYS_ID_AA64SMFR0_EL1, ID_AA64SMFR0_EL1_FA64_SHIFT, 1, FTR_UNSIGNED, ID_AA64SMFR0_EL1_FA64_IMP, CAP_HWCAP, KERNEL_HWCAP_SME_FA64),
> -	HWCAP_CAP(SYS_ID_AA64SMFR0_EL1, ID_AA64SMFR0_EL1_I16I64_SHIFT, 4, FTR_UNSIGNED, ID_AA64SMFR0_EL1_I16I64_IMP, CAP_HWCAP, KERNEL_HWCAP_SME_I16I64),
> -	HWCAP_CAP(SYS_ID_AA64SMFR0_EL1, ID_AA64SMFR0_EL1_F64F64_SHIFT, 1, FTR_UNSIGNED, ID_AA64SMFR0_EL1_F64F64_IMP, CAP_HWCAP, KERNEL_HWCAP_SME_F64F64),
> -	HWCAP_CAP(SYS_ID_AA64SMFR0_EL1, ID_AA64SMFR0_EL1_I8I32_SHIFT, 4, FTR_UNSIGNED, ID_AA64SMFR0_EL1_I8I32_IMP, CAP_HWCAP, KERNEL_HWCAP_SME_I8I32),
> -	HWCAP_CAP(SYS_ID_AA64SMFR0_EL1, ID_AA64SMFR0_EL1_F16F32_SHIFT, 1, FTR_UNSIGNED, ID_AA64SMFR0_EL1_F16F32_IMP, CAP_HWCAP, KERNEL_HWCAP_SME_F16F32),
> -	HWCAP_CAP(SYS_ID_AA64SMFR0_EL1, ID_AA64SMFR0_EL1_B16F32_SHIFT, 1, FTR_UNSIGNED, ID_AA64SMFR0_EL1_B16F32_IMP, CAP_HWCAP, KERNEL_HWCAP_SME_B16F32),
> -	HWCAP_CAP(SYS_ID_AA64SMFR0_EL1, ID_AA64SMFR0_EL1_F32F32_SHIFT, 1, FTR_UNSIGNED, ID_AA64SMFR0_EL1_F32F32_IMP, CAP_HWCAP, KERNEL_HWCAP_SME_F32F32),
> +	HWCAP_CAP(ID_AA64PFR1_EL1, SME, IMP, CAP_HWCAP, KERNEL_HWCAP_SME),
> +	HWCAP_CAP(ID_AA64SMFR0_EL1, FA64, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_FA64),
> +	HWCAP_CAP(ID_AA64SMFR0_EL1, I16I64, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_I16I64),
> +	HWCAP_CAP(ID_AA64SMFR0_EL1, F64F64, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_F64F64),
> +	HWCAP_CAP(ID_AA64SMFR0_EL1, I8I32, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_I8I32),
> +	HWCAP_CAP(ID_AA64SMFR0_EL1, F16F32, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_F16F32),
> +	HWCAP_CAP(ID_AA64SMFR0_EL1, B16F32, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_B16F32),
> +	HWCAP_CAP(ID_AA64SMFR0_EL1, F32F32, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_F32F32),
>  #endif /* CONFIG_ARM64_SME */
>  	{},
>  };
> @@ -2860,15 +2853,15 @@ static bool compat_has_neon(const struct arm64_cpu_capabilities *cap, int scope)
>  static const struct arm64_cpu_capabilities compat_elf_hwcaps[] = {
>  #ifdef CONFIG_COMPAT
>  	HWCAP_CAP_MATCH(compat_has_neon, CAP_COMPAT_HWCAP, COMPAT_HWCAP_NEON),
> -	HWCAP_CAP(SYS_MVFR1_EL1, MVFR1_EL1_SIMDFMAC_SHIFT, 4, FTR_UNSIGNED, MVFR1_EL1_SIMDFMAC_IMP, CAP_COMPAT_HWCAP, COMPAT_HWCAP_VFPv4),
> +	HWCAP_CAP(MVFR1_EL1, SIMDFMAC, IMP, CAP_COMPAT_HWCAP, COMPAT_HWCAP_VFPv4),
>  	/* Arm v8 mandates MVFR0.FPDP == {0, 2}. So, piggy back on this for the presence of VFP support */
> -	HWCAP_CAP(SYS_MVFR0_EL1, MVFR0_EL1_FPDP_SHIFT, 4, FTR_UNSIGNED, MVFR0_EL1_FPDP_VFPv3, CAP_COMPAT_HWCAP, COMPAT_HWCAP_VFP),
> -	HWCAP_CAP(SYS_MVFR0_EL1, MVFR0_EL1_FPDP_SHIFT, 4, FTR_UNSIGNED, MVFR0_EL1_FPDP_VFPv3, CAP_COMPAT_HWCAP, COMPAT_HWCAP_VFPv3),
> -	HWCAP_CAP(SYS_ID_ISAR5_EL1, ID_ISAR5_EL1_AES_SHIFT, 4, FTR_UNSIGNED, ID_ISAR5_EL1_AES_VMULL, CAP_COMPAT_HWCAP2, COMPAT_HWCAP2_PMULL),
> -	HWCAP_CAP(SYS_ID_ISAR5_EL1, ID_ISAR5_EL1_AES_SHIFT, 4, FTR_UNSIGNED, ID_ISAR5_EL1_AES_IMP, CAP_COMPAT_HWCAP2, COMPAT_HWCAP2_AES),
> -	HWCAP_CAP(SYS_ID_ISAR5_EL1, ID_ISAR5_EL1_SHA1_SHIFT, 4, FTR_UNSIGNED, ID_ISAR5_EL1_SHA1_IMP, CAP_COMPAT_HWCAP2, COMPAT_HWCAP2_SHA1),
> -	HWCAP_CAP(SYS_ID_ISAR5_EL1, ID_ISAR5_EL1_SHA2_SHIFT, 4, FTR_UNSIGNED, ID_ISAR5_EL1_SHA2_IMP, CAP_COMPAT_HWCAP2, COMPAT_HWCAP2_SHA2),
> -	HWCAP_CAP(SYS_ID_ISAR5_EL1, ID_ISAR5_EL1_CRC32_SHIFT, 4, FTR_UNSIGNED, ID_ISAR5_EL1_CRC32_IMP, CAP_COMPAT_HWCAP2, COMPAT_HWCAP2_CRC32),
> +	HWCAP_CAP(MVFR0_EL1, FPDP, VFPv3, CAP_COMPAT_HWCAP, COMPAT_HWCAP_VFP),
> +	HWCAP_CAP(MVFR0_EL1, FPDP, VFPv3, CAP_COMPAT_HWCAP, COMPAT_HWCAP_VFPv3),
> +	HWCAP_CAP(ID_ISAR5_EL1, AES, VMULL, CAP_COMPAT_HWCAP2, COMPAT_HWCAP2_PMULL),
> +	HWCAP_CAP(ID_ISAR5_EL1, AES, IMP, CAP_COMPAT_HWCAP2, COMPAT_HWCAP2_AES),
> +	HWCAP_CAP(ID_ISAR5_EL1, SHA1, IMP, CAP_COMPAT_HWCAP2, COMPAT_HWCAP2_SHA1),
> +	HWCAP_CAP(ID_ISAR5_EL1, SHA2, IMP, CAP_COMPAT_HWCAP2, COMPAT_HWCAP2_SHA2),
> +	HWCAP_CAP(ID_ISAR5_EL1, CRC32, IMP, CAP_COMPAT_HWCAP2, COMPAT_HWCAP2_CRC32),
>  #endif
>  	{},
>  };
> 
> -- 
> 2.30.2
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

_______________________________________________
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      reply	other threads:[~2022-12-09 12:52 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-12-08 16:03 [PATCH 0/6] arm64/cpufeature: Make use of sysreg helpers for hwcaps Mark Brown
2022-12-08 16:03 ` [PATCH 1/6] arm64/cpufeature: Fix field sign for DIT hwcap detection Mark Brown
2022-12-09 12:25   ` Mark Rutland
2022-12-09 13:49     ` Mark Brown
2022-12-08 16:03 ` [PATCH 2/6] arm64/sysreg: Fix errors in 32 bit enumeration values Mark Brown
2022-12-09 12:29   ` Mark Rutland
2022-12-08 16:03 ` [PATCH 3/6] arm64/sysreg: Allow enumerations to be declared as signed Mark Brown
2022-12-09 12:34   ` Mark Rutland
2022-12-09 13:55     ` Mark Brown
2022-12-08 16:03 ` [PATCH 4/6] arm64/sysreg: Annotate signed enumerations Mark Brown
2022-12-09 12:42   ` Mark Rutland
2022-12-09 13:33     ` Mark Brown
2022-12-09 16:03       ` Mark Rutland
2022-12-08 16:03 ` [PATCH 5/6] arm64/cpufeature: Always use symbolic name for feature value in hwcaps Mark Brown
2022-12-09 12:48   ` Mark Rutland
2022-12-08 16:03 ` [PATCH 6/6] arm64/cpufeature: Use helper macros to specify hwcaps Mark Brown
2022-12-09 12:51   ` Mark Rutland [this message]

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