Re: [PATCH] GICv3: Add restart handler to detach CPU from GICv3

[Mark Rutland <mark.rutland@arm.com>]

On Tue, Jan 03, 2023 at 04:27:07PM +0000, Joakim Tjernlund wrote:
> On Fri, 2022-12-16 at 17:21 +0100, Joakim Tjernlund wrote:
> 
> Ping?

To whom?

You don't appeared to have Cc'd any relevant maintainer, and people are still
on holiday, so it's extremely likely this will be missed.

For the maintainer, please use scripts/get_maintainer.pl, e.g.

| [mark@lakrids:~/src/linux]% ./scripts/get_maintainer.pl -f drivers/irqchip/irq-gic-v3.c
| Thomas Gleixner <tglx@linutronix.de> (maintainer:IRQCHIP DRIVERS)
| Marc Zyngier <maz@kernel.org> (maintainer:IRQCHIP DRIVERS)
| linux-kernel@vger.kernel.org (open list:IRQCHIP DRIVERS)

Note: I've Cc'd Marc, who wrote the GICv3 driver.

> > Needed for reboot without resetting the whole GIC

This doesn't really explain what you're trying to do nor why.

Why do you need to "reboot without resetting the whole GIC" ?

Do you encounter a problem if we try to reset the whole GIC?

Is this for kexec?

Is this for some use-case enabled by out-of-tree code?

Thanks,
Mark.

> > 
> > Signed-off-by: Joakim Tjernlund <joakim.tjernlund@infinera.com>
> > ---
> >  drivers/irqchip/irq-gic-v3.c | 18 ++++++++++++++++++
> >  1 file changed, 18 insertions(+)
> > 
> > diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c
> > index dd7e7f061e8f..1989ea3d2db4 100644
> > --- a/drivers/irqchip/irq-gic-v3.c
> > +++ b/drivers/irqchip/irq-gic-v3.c
> > @@ -23,6 +23,7 @@
> >  #include <linux/irqchip/arm-gic-common.h>
> >  #include <linux/irqchip/arm-gic-v3.h>
> >  #include <linux/irqchip/irq-partition-percpu.h>
> > +#include <linux/reboot.h>
> >  
> >  #include <asm/cputype.h>
> >  #include <asm/exception.h>
> > @@ -1359,6 +1360,22 @@ static void gic_cpu_pm_init(void)
> >  static inline void gic_cpu_pm_init(void) { }
> >  #endif /* CONFIG_CPU_PM */
> >  
> > +static int gicv3_restart_notify(struct notifier_block *nb,
> > +                              unsigned long mode, void *cmd)
> > +{
> > +       if (gic_dist_security_disabled()) {
> > +               gic_write_grpen1(0);
> > +               gic_enable_redist(false);
> > +       }
> > +
> > +       return NOTIFY_DONE;
> > +}
> > +
> > +static struct notifier_block gicv3_restart_nb = {
> > +       .notifier_call = gicv3_restart_notify,
> > +       .priority = 255, /* Call last */
> > +};
> > +
> >  static struct irq_chip gic_chip = {
> >  	.name			= "GICv3",
> >  	.irq_mask		= gic_mask_irq,
> > @@ -1849,6 +1866,7 @@ static int __init gic_init_bases(void __iomem *dist_base,
> >  	gic_cpu_init();
> >  	gic_smp_init();
> >  	gic_cpu_pm_init();
> > +	register_restart_handler(&gicv3_restart_nb);
> >  
> >  	if (gic_dist_supports_lpis()) {
> >  		its_init(handle, &gic_data.rdists, gic_data.domain);
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel