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From: Oliver Upton To: Akihiko Odaki Cc: Mark Brown , Marc Zyngier , linux-kernel@vger.kernel.org, kvmarm@lists.linux.dev, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org, Mathieu Poirier , Suzuki K Poulose , Alexandru Elisei , James Morse , Will Deacon , Catalin Marinas , asahi@lists.linux.dev, Alyssa Rosenzweig , Sven Peter , Hector Martin Subject: Re: [PATCH v5 6/7] KVM: arm64: Mask FEAT_CCIDX Message-ID: References: <20221230095452.181764-1-akihiko.odaki@daynix.com> <20221230095452.181764-7-akihiko.odaki@daynix.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20221230095452.181764-7-akihiko.odaki@daynix.com> X-Migadu-Flow: FLOW_OUT X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230105_142218_564993_21B20626 X-CRM114-Status: GOOD ( 15.19 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, Dec 30, 2022 at 06:54:51PM +0900, Akihiko Odaki wrote: > The CCSIDR access handler masks the associativity bits according to the > bit layout for processors without FEAT_CCIDX. KVM also assumes CCSIDR is > 32-bit where it will be 64-bit if FEAT_CCIDX is enabled. Mask FEAT_CCIDX > so that these assumptions hold. > > Suggested-by: Marc Zyngier > Signed-off-by: Akihiko Odaki FYI, I'm an idiot and replied to v4 of this patch... Forwarding comments below: > --- > arch/arm64/kvm/sys_regs.c | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c > index f4a7c5abcbca..aeabf1f3370b 100644 > --- a/arch/arm64/kvm/sys_regs.c > +++ b/arch/arm64/kvm/sys_regs.c > @@ -1124,6 +1124,12 @@ static u64 read_id_reg(const struct kvm_vcpu *vcpu, struct sys_reg_desc const *r > ID_DFR0_PERFMON_SHIFT, > kvm_vcpu_has_pmu(vcpu) ? ID_DFR0_PERFMON_8_4 : 0); > break; > + case SYS_ID_AA64MMFR2_EL1: > + val &= ~ID_AA64MMFR2_EL1_CCIDX_MASK; > + break; > + case SYS_ID_MMFR4_EL1: > + val &= ~ARM64_FEATURE_MASK(ID_MMFR4_CCIDX); > + break; Not that it is necessarily worth addressing, but I wanted to point something out. This change breaks migration from older kernels on implementations w/ FEAT_CCIDX. There is most likely exactly 0 of those in the wild, but we need to be careful changing user-visible stuff like this. -- Thanks, Oliver _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel