From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EF1CCC54EBD for ; Tue, 10 Jan 2023 02:02:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=JAemC+Sy+gY9PEiN16mJYPxKUtoKrQMadQuSaP/3EIs=; b=dQ/cWgIoL+zZnl J7yAgkCFj/iaVnoUp5KX0uY91HRrxj98u1+/+CMVz/V9ZMSWdE8xwcr7XV95gn8KvV8QvTsv+xr4h 9csNac7G80yA5R/m2Y0QuQuN498BZVihvACSU8eSTmJvzdjctSxIqnsrzzvZZQAFq2CFUVS/npg7Q QTHRsMJtJEdW+2S1/82pJecczO77OK20AFSXAZMrnv5n5AO71B6ODsSQSVUeJKdCe86pR68SocK9m 88lcNIw4qCu0YqIFE7mbNvFQ838I51KREKfarnLQgB+8zq308nU9Je+04uY+jVmHjrBR12OqPZ3Ob jfATwRwrwHmcFcokHQmw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1pF3ws-004vRY-W8; Tue, 10 Jan 2023 02:01:11 +0000 Received: from out-5.mta0.migadu.com ([2001:41d0:1004:224b::5]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1pF3wp-004vQF-Qy for linux-arm-kernel@lists.infradead.org; Tue, 10 Jan 2023 02:01:09 +0000 Date: Tue, 10 Jan 2023 02:01:00 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1673316064; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=QlpukRc+Putp0ejqXteDPBnVcvmJAb1SPiaGSSl2fVw=; b=ZeFdRb1DNlq70KAQVg6FRY1iV3JBdghauAa4cPTFJVdHFcFpHvC6208PYlE1RfXVgwKPXA BDmHZmehmHUOlIuXub373b7KigvbndxnMcQ76I67OEUE4aoeogayV+ZMvd4NIyRke8QO3g kAnCHznoskMbxs4GnfvGpRV+BAoaq7Q= X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. From: Oliver Upton To: Reiji Watanabe Cc: Marc Zyngier , kvmarm@lists.cs.columbia.edu, kvmarm@lists.linux.dev, kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, James Morse , Alexandru Elisei , Suzuki K Poulose , Paolo Bonzini , Ricardo Koller , Jing Zhang , Raghavendra Rao Anata Subject: Re: [PATCH 0/7] KVM: arm64: PMU: Allow userspace to limit the number of PMCs on vCPU Message-ID: References: <20221230035928.3423990-1-reijiw@google.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20221230035928.3423990-1-reijiw@google.com> X-Migadu-Flow: FLOW_OUT X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230109_180108_296561_53D0878D X-CRM114-Status: GOOD ( 18.86 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Reiji, On Thu, Dec 29, 2022 at 07:59:21PM -0800, Reiji Watanabe wrote: > The goal of this series is to allow userspace to limit the number > of PMU event counters on the vCPU. > > The number of PMU event counters is indicated in PMCR_EL0.N. > For a vCPU with PMUv3 configured, its value will be the same as > the host value by default. Userspace can set PMCR_EL0.N for the > vCPU to a lower value than the host value, using KVM_SET_ONE_REG. > However, it is practically unsupported, as KVM resets PMCR_EL0.N > to the host value on vCPU reset and some KVM code uses the host > value to identify (un)implemented event counters on the vCPU. > > This series will ensure that the PMCR_EL0.N value is preserved > on vCPU reset and that KVM doesn't use the host value > to identify (un)implemented event counters on the vCPU. > This allows userspace to limit the number of the PMU event > counters on the vCPU. I just wanted to bring up the conversation we had today on the list as it is a pretty relevant issue. KVM currently allows any value to be written to PMCR_EL0.N, meaning that userspace could advertize more PMCs than are supported by the system. IDK if Marc feels otherwise, but it doesn't seem like we should worry about ABI change here (i.e. userspace can no longer write junk to the register) as KVM has advertized the correct value to userspace. The only case that breaks would be a userspace that intentionally sets PMCR_EL0.N to something larger than the host. As accesses to unadvertized PMC indices is CONSTRAINED UNPRED behavior, I'm having a hard time coming up with a use case. -- Thanks, Oliver _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel