From: Bjorn Andersson <bjorn.andersson@linaro.org>
To: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: catalin.marinas@arm.com, agross@kernel.org, will@kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-arm-msm@vger.kernel.org
Subject: Re: [PATCH] arm64: defconfig: Enable Qcom SNPS Femto PHY
Date: Fri, 15 Jan 2021 10:19:11 -0600 [thread overview]
Message-ID: <YAHAf5HpGw11bu/l@builder.lan> (raw)
In-Reply-To: <20200918125312.2920-1-manivannan.sadhasivam@linaro.org>
On Fri 18 Sep 07:53 CDT 2020, Manivannan Sadhasivam wrote:
> Enable Qualcomm USB high-speed SNPS Femto phy found in Qualcomm
> chipsets.
>
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> ---
> arch/arm64/configs/defconfig | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
> index 47ae0ab7e9e8..a803853fc71e 100644
> --- a/arch/arm64/configs/defconfig
> +++ b/arch/arm64/configs/defconfig
> @@ -953,6 +953,7 @@ CONFIG_PHY_MVEBU_CP110_COMPHY=y
> CONFIG_PHY_QCOM_QMP=m
> CONFIG_PHY_QCOM_QUSB2=m
> CONFIG_PHY_QCOM_USB_HS=y
> +CONFIG_PHY_QCOM_USB_SNPS_FEMTO_V2=y
We should be able to reach initramfs without this, so please make it =m.
Regards,
Bjorn
> CONFIG_PHY_RCAR_GEN3_PCIE=y
> CONFIG_PHY_RCAR_GEN3_USB2=y
> CONFIG_PHY_RCAR_GEN3_USB3=m
> --
> 2.17.1
>
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prev parent reply other threads:[~2021-01-15 16:21 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-18 12:53 [PATCH] arm64: defconfig: Enable Qcom SNPS Femto PHY Manivannan Sadhasivam
2021-01-15 16:19 ` Bjorn Andersson [this message]
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