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From: William Breathitt Gray <vilhelm.gray@gmail.com>
To: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Cc: jic23@kernel.org, david@lechnology.com,
	alexandre.torgue@foss.st.com, mcoquelin.stm32@gmail.com,
	olivier.moysan@foss.st.com, linux-iio@vger.kernel.org,
	linux-stm32@st-md-mailman.stormreply.com,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH] counter: stm32-timer-cnt: fix ceiling write max value
Date: Wed, 3 Mar 2021 08:42:30 +0900	[thread overview]
Message-ID: <YD7NZiqCtmtmqJGg@shinobu> (raw)
In-Reply-To: <e54d1446-b583-9625-1ab3-09e54d6a7456@foss.st.com>


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On Tue, Mar 02, 2021 at 06:03:25PM +0100, Fabrice Gasnier wrote:
> On 3/2/21 3:56 PM, William Breathitt Gray wrote:
> > Side question: if priv->ceiling is tracking the current ceiling
> > configuration, would it make sense to change stm32_count_ceiling_read()
> > to print the value of priv->ceiling instead of doing a regmap_read()
> > call?
> 
> Hi William,
> 
> Thanks for reviewing.
> 
> I'd be fine either way. So no objection to move to the priv->ceiling
> (cached) value. It could also here here.
> By looking at this, I figured out there's probably another thing to fix
> here, for initial conditions.
> 
> At probe time priv->ceiling is initialized to max value (ex 65535 for a
> 16 bits counter). But the register content is 0 (clear by mfd driver at
> probe time).
> 
> - So, reading ceiling from sysfs currently reports 0 (regmap_read())
> after booting and probing.
> 
> I see two cases at this point:
> - In case the counter gets enabled without any prior configuration, it
> won't count: ceiling value (e.g. 65535) should be written to register
> before it is enabled, so the counter will actually count. So there's
> room for a fix here.
> 
> - In case function gets set (ex: quadrature x4), priv->ceiling (e.g.
> 65535) gets written to the register (although it's been read earlier as
> 0 from sysfs).
> This could be fixed by reading the priv->ceiling in
> stm32_count_ceiling_read() as you're asking (provided 1st case has been
> fixed as well)
> 
> I'll probably prepare one or two patches for the above cases, if you agree ?
> 
> Best Regards,
> Fabrice

Looking through the driver, it doesn't seem like priv->ceiling is used
in any performance critical code, just the callbacks for count_write()
and function_set(). It might make more sense to remove priv->ceiling and
replace it with the regmap_read() calls where necessary so that we
always get the most current ceiling value from the device when needed.

As for the default ceiling value for the device at probe time, this
should probably be set to the max value because that is what a normal
user would expect when loading a Counter driver (a ceiling value of 0 at
startup is somewhat unintuitive).

If you prepare those two patches, then that should resolve this.

William Breathitt Gray

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  reply	other threads:[~2021-03-03 17:53 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-02 14:43 [PATCH] counter: stm32-timer-cnt: fix ceiling write max value Fabrice Gasnier
2021-03-02 14:56 ` William Breathitt Gray
2021-03-02 17:03   ` Fabrice Gasnier
2021-03-02 23:42     ` William Breathitt Gray [this message]
2021-03-03 16:11       ` Fabrice Gasnier
2021-03-06 16:47   ` Jonathan Cameron

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