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Sun, 21 Feb 2021 18:06:55 -0800 (PST) Date: Mon, 22 Feb 2021 11:06:49 +0900 From: William Breathitt Gray To: David Lechner Subject: Re: [PATCH v8 03/22] counter: 104-quad-8: Return error when invalid mode during ceiling_write Message-ID: References: <2be0c071e7730ea16b8faa1efcd3d0d908e7f9db.1613131238.git.vilhelm.gray@gmail.com> <8e7daaad-e824-a823-1465-327cbc90ab23@lechnology.com> MIME-Version: 1.0 In-Reply-To: <8e7daaad-e824-a823-1465-327cbc90ab23@lechnology.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210221_210700_995368_F8EDCA96 X-CRM114-Status: GOOD ( 23.75 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: kamel.bouhara@bootlin.com, gwendal@chromium.org, a.fatoum@pengutronix.de, mcoquelin.stm32@gmail.com, linux-iio@vger.kernel.org, patrick.havelange@essensium.com, alexandre.belloni@bootlin.com, linux-kernel@vger.kernel.org, o.rempel@pengutronix.de, linux-arm-kernel@lists.infradead.org, kernel@pengutronix.de, fabrice.gasnier@st.com, syednwaris@gmail.com, linux-stm32@st-md-mailman.stormreply.com, jic23@kernel.org, alexandre.torgue@st.com Content-Type: multipart/mixed; boundary="===============3191099744644612266==" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org --===============3191099744644612266== Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="/YbOQ52TSX5QvpA5" Content-Disposition: inline --/YbOQ52TSX5QvpA5 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Sat, Feb 20, 2021 at 10:30:03AM -0600, David Lechner wrote: > On 2/12/21 6:13 AM, William Breathitt Gray wrote: > > The 104-QUAD-8 only has two count modes where a ceiling value makes > > sense: Range Limit and Modulo-N. Outside of these two modes, setting a > > ceiling value is an invalid operation -- so let's report it as such by > > returning -EINVAL. > >=20 > > Fixes: fc069262261c ("counter: 104-quad-8: Add lock guards - generic in= terface") > > Cc: Syed Nayyar Waris > > Signed-off-by: William Breathitt Gray > > --- > > drivers/counter/104-quad-8.c | 5 +++-- > > 1 file changed, 3 insertions(+), 2 deletions(-) > >=20 > > diff --git a/drivers/counter/104-quad-8.c b/drivers/counter/104-quad-8.c > > index 9691f8612be8..f0608b21196a 100644 > > --- a/drivers/counter/104-quad-8.c > > +++ b/drivers/counter/104-quad-8.c > > @@ -714,13 +714,14 @@ static ssize_t quad8_count_ceiling_write(struct c= ounter_device *counter, > > switch (priv->count_mode[count->id]) { > > case 1: > > case 3: > > + mutex_unlock(&priv->lock); > > quad8_preset_register_set(priv, count->id, ceiling); > > - break; > > + return len; > > } > > =20 > > mutex_unlock(&priv->lock); > > =20 > > - return len; > > + return -EINVAL; > > } > > =20 > > static ssize_t quad8_count_preset_enable_read(struct counter_device *= counter, > >=20 >=20 > What happens if the register is written to when in the wrong mode? >=20 > If it doesn't hurt anything, I would suggest always writing the register > instead so that users don't have to know worry about the fact that the mo= de > has to be set first. Unfortunately this register is used for two different functions: as a ceiling limit and as a preset value. When we're in the preset mode, the value of this register will be used to set the counter value when an interrupt occurs; whereas in ceiling mode, this value is used as the upper counting limit for the counter. We should only set this value when in the correct mode, lest we end clobbering the value for the other mode (e.g. user sets ceiling value, but driver unexpectantly changes the preset value). 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