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[35.233.69.230]) by smtp.gmail.com with ESMTPSA id v3sm16837255wmj.25.2021.03.22.07.19.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Mar 2021 07:19:51 -0700 (PDT) Date: Mon, 22 Mar 2021 14:19:48 +0000 From: Quentin Perret To: Marc Zyngier Cc: catalin.marinas@arm.com, will@kernel.org, james.morse@arm.com, julien.thierry.kdev@gmail.com, suzuki.poulose@arm.com, android-kvm@google.com, seanjc@google.com, mate.toth-pal@arm.com, linux-kernel@vger.kernel.org, robh+dt@kernel.org, linux-arm-kernel@lists.infradead.org, kernel-team@android.com, kvmarm@lists.cs.columbia.edu, tabba@google.com, ardb@kernel.org, mark.rutland@arm.com, dbrazdil@google.com Subject: Re: [PATCH v6 13/38] KVM: arm64: Enable access to sanitized CPU features at EL2 Message-ID: References: <20210319100146.1149909-1-qperret@google.com> <20210319100146.1149909-14-qperret@google.com> <87o8fbgv5l.wl-maz@kernel.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <87o8fbgv5l.wl-maz@kernel.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210322_141955_458407_B77926AE X-CRM114-Status: GOOD ( 19.40 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hey Marc, On Monday 22 Mar 2021 at 13:44:38 (+0000), Marc Zyngier wrote: > I can't say I'm thrilled with this. Actually, it is fair to say that I > don't like it at all! ;-) :-) > Copying whole structures with pointers that > make no sense at EL2 feels... wrong. And I don't disagree at all. I tried to keep this as small as possible as the series is already quite intrusive, but I certainly understand the concern. > As we discussed offline, the main reason for this infrastructure is > that the read_ctr macro directly uses arm64_ftr_reg_ctrel0.sys_val > when ARM64_MISMATCHED_CACHE_TYPE is set. Indeed that is the only reason. > One thing to realise is that with the protected mode, we can rely on > patching as there is no such thing as a "late" CPU. So by specialising > read_ctr when compiled for nVHE, we can just make it give us the final > value, provided that KVM's own __flush_dcache_area() is limited to > protected mode. > > Once this problem is solved, this whole patch can mostly go, as we are > left with exactly *two* u64 quantities to be populated, something that > we can probably do in kvm_sys_reg_table_init(). > > I'll post some patches later today to try and explain what I have in > mind. Sounds great, thank you very much for the help! Quentin _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel