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[84.226.111.173]) by smtp.gmail.com with ESMTPSA id qo6sm8570087ejb.122.2021.07.21.10.46.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 21 Jul 2021 10:46:55 -0700 (PDT) Date: Wed, 21 Jul 2021 19:46:34 +0200 From: Jean-Philippe Brucker To: Oliver Upton Cc: Alexandru Elisei , salil.mehta@huawei.com, lorenzo.pieralisi@arm.com, kvm@vger.kernel.org, corbet@lwn.net, maz@kernel.org, linux-kernel@vger.kernel.org, jonathan.cameron@huawei.com, catalin.marinas@arm.com, pbonzini@redhat.com, will@kernel.org, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org Subject: Re: [RFC PATCH 0/5] KVM: arm64: Pass PSCI to userspace Message-ID: References: <20210608154805.216869-1-jean-philippe@linaro.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210721_104657_726217_A5102740 X-CRM114-Status: GOOD ( 21.34 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, Jul 19, 2021 at 12:37:52PM -0700, Oliver Upton wrote: > On Mon, Jul 19, 2021 at 11:02 AM Jean-Philippe Brucker > wrote: > > We forward the whole PSCI function range, so it's either KVM or userspace. > > If KVM manages PSCI and the guest calls an unimplemented function, that > > returns directly to the guest without going to userspace. > > > > The concern is valid for any other range, though. If userspace enables the > > HVC cap it receives function calls that at some point KVM might need to > > handle itself. So we need some negotiation between user and KVM about the > > specific HVC ranges that userspace can and will handle. > > Are we going to use KVM_CAPs for every interesting HVC range that > userspace may want to trap? I wonder if a more generic interface for > hypercall filtering would have merit to handle the aforementioned > cases, and whatever else a VMM will want to intercept down the line. > > For example, x86 has the concept of 'MSR filtering', wherein userspace > can specify a set of registers that it wants to intercept. Doing > something similar for HVCs would avoid the need for a kernel change > each time a VMM wishes to intercept a new hypercall. Yes we could introduce a VM device group for this: * User reads attribute KVM_ARM_VM_HVC_NR_SLOTS, which defines the number of available HVC ranges. * User writes attribute KVM_ARM_VM_HVC_SET_RANGE with one range struct kvm_arm_hvc_range { __u32 slot; #define KVM_ARM_HVC_USER (1 << 0) /* Enable range. 0 disables it */ __u16 flags; __u16 imm; __u32 fn_start; __u32 fn_end; }; * KVM forwards any HVC within this range to userspace. * If one of the ranges is PSCI functions, disable KVM PSCI. Since it's more work for KVM to keep track of ranges, I didn't include it in the RFC, and I'm going to leave it to the next person dealing with this stuff :) Thanks, Jean _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel