From: Andrew Lunn <andrew@lunn.ch>
To: Linus Walleij <linus.walleij@linaro.org>
Cc: linux-arm-kernel@lists.infradead.org,
Imre Kaloz <kaloz@openwrt.org>,
Krzysztof Halasa <khalasa@piap.pl>, Rod Whitby <rod@whitby.id.au>,
Marc Zyngier <maz@kernel.org>
Subject: Re: [PATCH] ARM: dts: ixp4xx: Add a devicetree for Freecom FSG-3
Date: Thu, 29 Jul 2021 17:43:06 +0200 [thread overview]
Message-ID: <YQLMikcayVvaeBAx@lunn.ch> (raw)
In-Reply-To: <20210729144128.2834328-1-linus.walleij@linaro.org>
> + /* EthB */
> + ethernet@c8009000 {
> + status = "ok";
> + queue-rx = <&qmgr 3>;
> + queue-txready = <&qmgr 20>;
> + phy-mode = "rgmii";
> + phy-handle = <&phy5>;
> +
> + mdio {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + phy4: ethernet-phy@4 {
> + reg = <4>;
> + };
> +
> + phy5: ethernet-phy@5 {
> + reg = <5>;
> + };
> + };
> + };
> +
> + /* EthC */
> + ethernet@c800a000 {
> + status = "ok";
> + queue-rx = <&qmgr 4>;
> + queue-txready = <&qmgr 21>;
> + phy-mode = "rgmii";
> + phy-handle = <&phy4>;
> + };
https://usermanual.wiki/Freecom-Technologies/FreecomTechnologiesFsg3UsersManual552148.1686484831/view
This appears to also have an Ethernet switch. So is suspect this is
also wrong in the same way.
Andrew
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next prev parent reply other threads:[~2021-07-29 15:46 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-29 14:41 [PATCH] ARM: dts: ixp4xx: Add a devicetree for Freecom FSG-3 Linus Walleij
2021-07-29 15:43 ` Andrew Lunn [this message]
2021-07-30 12:21 ` Linus Walleij
2021-07-30 12:33 ` Marc Zyngier
2021-08-01 13:22 ` Marc Zyngier
2021-08-01 13:55 ` Andrew Lunn
2021-08-01 18:59 ` Marc Zyngier
2021-08-02 22:05 ` Linus Walleij
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