From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_ADSP_CUSTOM_MED,DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 27BC5C4320A for ; Wed, 1 Sep 2021 22:10:30 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id EB31861075 for ; Wed, 1 Sep 2021 22:10:29 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org EB31861075 Authentication-Results: mail.kernel.org; dmarc=fail (p=reject dis=none) header.from=google.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=6lbiHNtIYYDtXtfqOu8ucIPbDx9v7JjQe935Z0jnqFM=; b=eH2EZwXZiYpyGG SwYELjDT8BLTK8Zvp1csm7TmKWST1P4ApKWXXrWFi/RHX7kcGiBQF8JWx8Pcpa6mZSOEtPB4wYMx5 9kqzgTvzqWCOiKE42RkH2KEGxGpgjer/FEWtfKDZf3v5mzkpTQme62l7YBevyZeXdnB4Xf+wmQ+Ny ixZjeYH9iKZoMyCKXh5+zZc54Zk3h4S+42rlBCUTl7s1jQKZy9wSVDrAUSKum2gXvGnNdtLU2L4GN ElzPVXpQ4wSQbhdjuGfZ0L81gBjGFmS0No72p7m9hJ7msmfLvdC96lHgQRVd7vNsYM+2H97Rd7d97 SiwC7T6899DjLPjJaTyw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mLYPO-007dMS-0R; Wed, 01 Sep 2021 22:08:38 +0000 Received: from mail-il1-x134.google.com ([2607:f8b0:4864:20::134]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mLYPJ-007dKa-3y for linux-arm-kernel@lists.infradead.org; Wed, 01 Sep 2021 22:08:34 +0000 Received: by mail-il1-x134.google.com with SMTP id u7so820878ilk.7 for ; Wed, 01 Sep 2021 15:08:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to; bh=tPUheJaZHBcw4vca9HyUxGYJolSn/dkPnRtCmems3Kk=; b=XBRkHtg5GUG48wrLz+RUhRTD7Q7TWZFMtYe69RP+BmyRwImiVD2LD83lEVcJTo+HE0 XMDBWHB3Il+/uvFYFRnBOOgEb6KO9VTDo0rKZrTe7FxM87LjoQDRcjyqYNkIwOHOHD/X fYaWNizVlQ+kn5Pdxs0gShGtRFvReUizq5VH+bWHy5E4rowruiih+MC8iU/NbUriSMMh C2fpPAwih/gSvxg8n/52V7XpcyPrrm8yu6hDs7WSD1jJ0Q2eZCZJGUMl5yafDxyIjfSd FoZzcMXOAtCRsUfvWIF6gohZFSLO1o8TVvFiKnL/HBNmiZWmiiFjjvMgaaS+gubMIlf+ LUbg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=tPUheJaZHBcw4vca9HyUxGYJolSn/dkPnRtCmems3Kk=; b=kTUtMBjFtx2xqYeAxrYi3/Rt0Y0tTPWZ414WoNgMBEbi3siSZx5drUvaV/intxk63N em16RuOqv10Kb7axuz4y0/jMC8C7TdTm0icf3A1m0gUdd/4niu+TyoAwtxkwt8P7/M9M 6rLGjbgZrYBjYmuYB57HQ1a/s16oNMAB8v1raJ1+qiWY21MEKQFy03VeTxX3vtMwsKQ0 IbBGVKNGLRpfsXfJSN9jQtzwJAjFdSckXzGgZxgg0gZ16FCmWiVjyAuO7ZlfkZWR9sk/ R+HZYtMk+Gq/nCnP6dRDZdX50+AajRIfvVEdKyaFtjl0pGnNc1lTQ1E0QPK/zis6byYF snsw== X-Gm-Message-State: AOAM531YqCW0cSPq/gKVAI9QRWkwusyStHfXLXf+6KzaG5QPLSZevXLu RkmeXdCY5aULADi5tEzktcv3QQ== X-Google-Smtp-Source: ABdhPJy7j9n5AI8PSx1LUhSYg41KM1gcaY+NB3v8gxt4nUeuUOMHYoY6GxgdiPT9WZl4I3pv1HmPuQ== X-Received: by 2002:a92:870b:: with SMTP id m11mr1143869ild.132.1630534112153; Wed, 01 Sep 2021 15:08:32 -0700 (PDT) Received: from google.com (194.225.68.34.bc.googleusercontent.com. [34.68.225.194]) by smtp.gmail.com with ESMTPSA id p15sm490025ilc.12.2021.09.01.15.08.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 01 Sep 2021 15:08:31 -0700 (PDT) Date: Wed, 1 Sep 2021 22:08:28 +0000 From: Oliver Upton To: Raghavendra Rao Ananta Cc: Paolo Bonzini , Marc Zyngier , James Morse , Alexandru Elisei , Suzuki K Poulose , Catalin Marinas , Will Deacon , Peter Shier , Ricardo Koller , Reiji Watanabe , Jing Zhang , linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, linux-kernel@vger.kernel.org, kvm@vger.kernel.org Subject: Re: [PATCH v3 02/12] KVM: arm64: selftests: Add write_sysreg_s and read_sysreg_s Message-ID: References: <20210901211412.4171835-1-rananta@google.com> <20210901211412.4171835-3-rananta@google.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210901_150833_246405_5882073B X-CRM114-Status: GOOD ( 27.81 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Sep 01, 2021 at 09:28:28PM +0000, Oliver Upton wrote: > On Wed, Sep 01, 2021 at 09:14:02PM +0000, Raghavendra Rao Ananta wrote: > > For register names that are unsupported by the assembler or the ones > > without architectural names, add the macros write_sysreg_s and > > read_sysreg_s to support them. > > > > The functionality is derived from kvm-unit-tests and kernel's > > arch/arm64/include/asm/sysreg.h. > > > > Signed-off-by: Raghavendra Rao Ananta > > Would it be possible to just include ? See > tools/arch/arm64/include/asm/sysreg.h Geez, sorry for the noise. I mistakenly searched from the root of my repository, not the tools/ directory. In any case, you could perhaps just drop the kernel header there just to use the exact same source for kernel and selftest. Thanks, Oliver > > --- > > .../selftests/kvm/include/aarch64/processor.h | 61 +++++++++++++++++++ > > 1 file changed, 61 insertions(+) > > > > diff --git a/tools/testing/selftests/kvm/include/aarch64/processor.h b/tools/testing/selftests/kvm/include/aarch64/processor.h > > index 3cbaf5c1e26b..082cc97ad8d3 100644 > > --- a/tools/testing/selftests/kvm/include/aarch64/processor.h > > +++ b/tools/testing/selftests/kvm/include/aarch64/processor.h > > @@ -118,6 +118,67 @@ void vm_install_exception_handler(struct kvm_vm *vm, > > void vm_install_sync_handler(struct kvm_vm *vm, > > int vector, int ec, handler_fn handler); > > > > +/* > > + * ARMv8 ARM reserves the following encoding for system registers: > > + * (Ref: ARMv8 ARM, Section: "System instruction class encoding overview", > > + * C5.2, version:ARM DDI 0487A.f) > > + * [20-19] : Op0 > > + * [18-16] : Op1 > > + * [15-12] : CRn > > + * [11-8] : CRm > > + * [7-5] : Op2 > > + */ > > +#define Op0_shift 19 > > +#define Op0_mask 0x3 > > +#define Op1_shift 16 > > +#define Op1_mask 0x7 > > +#define CRn_shift 12 > > +#define CRn_mask 0xf > > +#define CRm_shift 8 > > +#define CRm_mask 0xf > > +#define Op2_shift 5 > > +#define Op2_mask 0x7 > > + > > +/* > > + * When accessed from guests, the ARM64_SYS_REG() doesn't work since it > > + * generates a different encoding for additional KVM processing, and is > > + * only suitable for userspace to access the register via ioctls. > > + * Hence, define a 'pure' sys_reg() here to generate the encodings as per spec. > > + */ > > +#define sys_reg(op0, op1, crn, crm, op2) \ > > + (((op0) << Op0_shift) | ((op1) << Op1_shift) | \ > > + ((crn) << CRn_shift) | ((crm) << CRm_shift) | \ > > + ((op2) << Op2_shift)) > > + > > +asm( > > +" .irp num,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30\n" > > +" .equ .L__reg_num_x\\num, \\num\n" > > +" .endr\n" > > +" .equ .L__reg_num_xzr, 31\n" > > +"\n" > > +" .macro mrs_s, rt, sreg\n" > > +" .inst 0xd5200000|(\\sreg)|(.L__reg_num_\\rt)\n" > > +" .endm\n" > > +"\n" > > +" .macro msr_s, sreg, rt\n" > > +" .inst 0xd5000000|(\\sreg)|(.L__reg_num_\\rt)\n" > > +" .endm\n" > > +); > > + > > +/* > > + * read_sysreg_s() and write_sysreg_s()'s 'reg' has to be encoded via sys_reg() > > + */ > > +#define read_sysreg_s(reg) ({ \ > > + u64 __val; \ > > + asm volatile("mrs_s %0, "__stringify(reg) : "=r" (__val)); \ > > + __val; \ > > +}) > > + > > +#define write_sysreg_s(reg, val) do { \ > > + u64 __val = (u64)val; \ > > + asm volatile("msr_s "__stringify(reg) ", %x0" : : "rZ" (__val));\ > > +} while (0) > > + > > #define write_sysreg(reg, val) \ > > ({ \ > > u64 __val = (u64)(val); \ > > -- > > 2.33.0.153.gba50c8fa24-goog > > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel