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[66.111.4.228]) by smtp.gmail.com with ESMTPSA id a17sm8619444ios.36.2021.08.23.05.50.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Aug 2021 05:50:16 -0700 (PDT) Received: from compute1.internal (compute1.nyi.internal [10.202.2.41]) by mailauth.nyi.internal (Postfix) with ESMTP id 1C70D27C0054; Mon, 23 Aug 2021 08:50:14 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute1.internal (MEProxy); Mon, 23 Aug 2021 08:50:15 -0400 X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvtddruddthedgheejucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhepfffhvffukfhfgggtuggjsehttdortddttddvnecuhfhrohhmpeeuohhquhhn ucfhvghnghcuoegsohhquhhnrdhfvghnghesghhmrghilhdrtghomheqnecuggftrfgrth htvghrnhepgeegudethfekleduteelfeevffduheejlefhfffgfefgkeeuieeiveejudfg hfffnecuffhomhgrihhnpehkvghrnhgvlhdrohhrghenucevlhhushhtvghrufhiiigvpe dtnecurfgrrhgrmhepmhgrihhlfhhrohhmpegsohhquhhnodhmvghsmhhtphgruhhthhhp vghrshhonhgrlhhithihqdeiledvgeehtdeigedqudejjeekheehhedvqdgsohhquhhnrd hfvghngheppehgmhgrihhlrdgtohhmsehfihigmhgvrdhnrghmvg X-ME-Proxy: Received: by mail.messagingengine.com (Postfix) with ESMTPA; Mon, 23 Aug 2021 08:50:12 -0400 (EDT) Date: Mon, 23 Aug 2021 20:49:29 +0800 From: Boqun Feng To: Lorenzo Pieralisi Cc: Catalin Marinas , Will Deacon , Bjorn Helgaas , Arnd Bergmann , Marc Zyngier , "K. Y. Srinivasan" , Haiyang Zhang , Stephen Hemminger , Wei Liu , Dexuan Cui , Rob Herring , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-hyperv@vger.kernel.org, linux-pci@vger.kernel.org, Sunil Muthuswamy , Mike Rapoport Subject: Re: [PATCH v6 0/8] PCI: hv: Support host bridge probing on ARM64 Message-ID: References: <20210726180657.142727-1-boqun.feng@gmail.com> <20210819141758.GA27305@lpieralisi> <20210823100959.GA3294@lpieralisi> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20210823100959.GA3294@lpieralisi> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210823_055018_812491_6A8EC8C8 X-CRM114-Status: GOOD ( 42.71 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, Aug 23, 2021 at 11:10:00AM +0100, Lorenzo Pieralisi wrote: > On Thu, Aug 19, 2021 at 11:47:52PM +0800, Boqun Feng wrote: > > On Thu, Aug 19, 2021 at 03:17:58PM +0100, Lorenzo Pieralisi wrote: > > > On Tue, Jul 27, 2021 at 02:06:49AM +0800, Boqun Feng wrote: > > > > Hi, > > > > > > > > This is the v6 for the preparation of virtual PCI support on Hyper-V > > > > ARM64, Previous versions: > > > > > > > > v1: https://lore.kernel.org/lkml/20210319161956.2838291-1-boqun.feng@gmail.com/ > > > > v2: https://lore.kernel.org/lkml/20210503144635.2297386-1-boqun.feng@gmail.com/ > > > > v3: https://lore.kernel.org/lkml/20210609163211.3467449-1-boqun.feng@gmail.com/ > > > > v4: https://lore.kernel.org/lkml/20210714102737.198432-1-boqun.feng@gmail.com/ > > > > v5: https://lore.kernel.org/lkml/20210720134429.511541-1-boqun.feng@gmail.com/ > > > > > > > > Changes since last version: > > > > > > > > * Rebase to 5.14-rc3 > > > > > > > > * Comment fixes as suggested by Bjorn. > > > > > > > > The basic problem we need to resolve is that ARM64 is an arch with > > > > PCI_DOMAINS_GENERIC=y, so the bus sysdata is pci_config_window. However, > > > > Hyper-V PCI provides a paravirtualized PCI interface, so there is no > > > > actual pci_config_window for a PCI host bridge, so no information can be > > > > retrieve from the pci_config_window of a Hyper-V virtual PCI bus. Also > > > > there is no corresponding ACPI device for the Hyper-V PCI root bridge, > > > > which introduces a special case when trying to find the ACPI device from > > > > the sysdata (see patch #3). > > > > > > > > With this patchset, we could enable the virtual PCI on Hyper-V ARM64 > > > > guest with other code under development. > > > > > > > > Comments and suggestions are welcome. > > > > > > > > Regards, > > > > Boqun > > > > > > > > Arnd Bergmann (1): > > > > PCI: hv: Generify PCI probing > > > > > > > > Boqun Feng (7): > > > > PCI: Introduce domain_nr in pci_host_bridge > > > > PCI: Support populating MSI domains of root buses via bridges > > > > arm64: PCI: Restructure pcibios_root_bridge_prepare() > > > > arm64: PCI: Support root bridge preparation for Hyper-V > > > > PCI: hv: Set ->domain_nr of pci_host_bridge at probing time > > > > PCI: hv: Set up MSI domain at bridge probing time > > > > PCI: hv: Turn on the host bridge probing on ARM64 > > > > > > > > arch/arm64/kernel/pci.c | 29 +++++++--- > > > > drivers/pci/controller/pci-hyperv.c | 86 +++++++++++++++++------------ > > > > drivers/pci/probe.c | 12 +++- > > > > include/linux/pci.h | 11 ++++ > > > > 4 files changed, 93 insertions(+), 45 deletions(-) > > > > > > If we take this series via the PCI tree we'd need Catalin/Will ACKs on > > > patches 3-4. > > > > > > > Got it. > > > > > I need some time to look into [1] (thanks for that). > > > > > > Without [1] patch 8 is ugly, that's no news. The question is whether > > > it is worth waiting for a kernel cycle to integrate [1] into this series > > > or not. > > > > > > Is it really a problem if we postpone this series for another kernel > > > cycle so that we can look into it ? > > > > > > > Well, it's definitely better for me that we can have it in 5.15-rc1 ;-), > > because it's a dependency for Hyper-V virtual PCI support on ARM64 and > > we plan to send the rest of work in 5.15 cycle. And I can just base on > > hyperv-next for the rest of the work if this is in 5.15-rc1. But yes, > > it's not really a problem, since this one still needs to work with other > > patches to support virtual PCI on ARM64 Hyper-V. > > > > In fact, I personally don't think [1] is better than patch 8 (plus patch > > 3 & 4): playing with ->private seems dangerous and not very helpful on > > readiblity, but I agree that we should explore every potential solution, > > and that's why I send [1]. > > Pulled the current series - now let's work together to improve it, I > will have a look into [1] in the weeks to come and get back to you with > some feedback. > Thanks a lot! Looking forwards to your feedback ;-) Regards, Boqun > Thanks, > Lorenzo > > > Regards, > > Boqun > > > > > [1] https://lore.kernel.org/lkml/20210811153619.88922-1-boqun.feng@gmail.com/ _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel