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[66.90.148.213]) by smtp.gmail.com with ESMTPSA id w15sm41445oiw.19.2021.08.25.08.45.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 25 Aug 2021 08:45:56 -0700 (PDT) Received: (nullmailer pid 2841976 invoked by uid 1000); Wed, 25 Aug 2021 15:45:54 -0000 Date: Wed, 25 Aug 2021 10:45:54 -0500 From: Rob Herring To: Baruch Siach Cc: Thierry Reding , Uwe =?iso-8859-1?Q?Kleine-K=F6nig?= , Lee Jones , Andy Gross , Bjorn Andersson , Balaji Prakash J , Robert Marko , Kathiravan T , linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v7 3/4] dt-bindings: pwm: add IPQ6018 binding Message-ID: References: <3b70f9e757e018d3cd91a882282040c4c0589a93.1629884907.git.baruch@tkos.co.il> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210825_084558_509701_F0AA054D X-CRM114-Status: GOOD ( 21.43 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Aug 25, 2021 at 12:48:26PM +0300, Baruch Siach wrote: > DT binding for the PWM block in Qualcomm IPQ6018 SoC. > = > Signed-off-by: Baruch Siach > --- > v7: > = > Use 'reg' instead of 'offset' (Rob) > = > Drop 'clock-names' and 'assigned-clock*' (Bjorn) > = > Use single cell address/size in example node (Bjorn) > = > Move '#pwm-cells' lower in example node (Bjorn) > = > List 'reg' as required > = > v6: > = > Device node is child of TCSR; remove phandle (Rob Herring) > = > Add assigned-clocks/assigned-clock-rates (Uwe Kleine-K=F6nig) > = > v5: Use qcom,pwm-regs for phandle instead of direct regs (Bjorn > Andersson, Kathiravan T) > = > v4: Update the binding example node as well (Rob Herring's bot) > = > v3: s/qcom,pwm-ipq6018/qcom,ipq6018-pwm/ (Rob Herring) > = > v2: Make #pwm-cells const (Rob Herring) > --- > .../devicetree/bindings/pwm/ipq-pwm.yaml | 52 +++++++++++++++++++ > 1 file changed, 52 insertions(+) > create mode 100644 Documentation/devicetree/bindings/pwm/ipq-pwm.yaml > = > diff --git a/Documentation/devicetree/bindings/pwm/ipq-pwm.yaml b/Documen= tation/devicetree/bindings/pwm/ipq-pwm.yaml > new file mode 100644 > index 000000000000..edfec41e77e5 > --- /dev/null > +++ b/Documentation/devicetree/bindings/pwm/ipq-pwm.yaml > @@ -0,0 +1,52 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/pwm/ipq-pwm.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Qualcomm IPQ6018 PWM controller > + > +maintainers: > + - Baruch Siach > + > +properties: > + "#pwm-cells": > + const: 2 > + > + compatible: > + const: qcom,ipq6018-pwm > + > + reg: > + description: Offset of PWM register in the TCSR block. > + maxItems: 1 > + > + clocks: > + maxItems: 1 > + > +required: > + - compatible > + - reg > + - clocks > + - "#pwm-cells" > + > +additionalProperties: false > + > +examples: > + - | > + #include > + > + tcsr: syscon@1937000 { > + compatible =3D "qcom,tcsr-ipq6018", "syscon", "simple-mfd"; This needs to be documented. Some visibility into what else is in this = block would be nice so we can make some informed decisions as to what = all this should look like. > + reg =3D <0x01937000 0x21000>; > + #address-cells =3D <1>; > + #size-cells =3D <0>; > + > + pwm: pwm@a010 { > + compatible =3D "qcom,ipq6018-pwm"; > + reg =3D <0xa010>; There's not a length associated with the PWM registers. > + clocks =3D <&gcc GCC_ADSS_PWM_CLK>; > + assigned-clocks =3D <&gcc GCC_ADSS_PWM_CLK>; > + assigned-clock-rates =3D <100000000>; > + #pwm-cells =3D <2>; > + }; > + }; > -- = > 2.32.0 > = > = _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel