From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A043DC433EF for ; Mon, 27 Sep 2021 16:40:22 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6C02E6108E for ; Mon, 27 Sep 2021 16:40:22 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 6C02E6108E Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=lunn.ch Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=0QUqyOz78fDKncCcrKXbWaftxczMyiqT05gEysXPb6I=; b=sawHYQagkWUZa4 89CR2ioICYThdvK+/rjIh8luZ9mrDKF1TuNeCeymYu++ri0aXA7WmLmoZaRqNslJEMbfeDTAAVpL4 veQJaY8uGmrg8wKMoygnZ4WeQfjWaY9/lJGnR/AqvGoZHA45kg9dKZ8PFwzcO57VTHZWsUgR0/6zi FgjAF8bQj0z0txuql1pyFs9OXIcKJuDW3GtYNxNJ6Mh1GDIF2lw80T7Erlcc5OdqTZU3wAb8zPZdn hUvR/btiJx8HrzYjjz1PNewAL/xYhcin+LCGtJ4DEHZvhzsr/kIIv6Fa8IhfBWmGrWlsT155BKk9u YvzMuAQ7PqYuJLYAJI2w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mUtdy-003OXg-R5; Mon, 27 Sep 2021 16:38:19 +0000 Received: from vps0.lunn.ch ([185.16.172.187]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mUtdm-003ORi-Ns for linux-arm-kernel@lists.infradead.org; Mon, 27 Sep 2021 16:38:08 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Disposition:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:From:Sender:Reply-To:Subject: Date:Message-ID:To:Cc:MIME-Version:Content-Type:Content-Transfer-Encoding: Content-ID:Content-Description:Content-Disposition:In-Reply-To:References; bh=BSzJ9MI1HCyI2LroQSjlIvcFGj03FSNKkHW9ACsfq4A=; b=vY/AlZB163CljHQKnWy4WTj309 NiKmGJaH+/JwqRQMsi09XP6i8ZyBaLtOH/qGayYpAEX0VKugsZtBW6h0hnBpnW0ihTvjDW4t1mxkH rYUuMct2J9IOAETw6vYCqByWYRSit6kuuaNpJPHFFwsUFvk4NY0sSCFNFC7R3hvortmE=; Received: from andrew by vps0.lunn.ch with local (Exim 4.94.2) (envelope-from ) id 1mUtdk-008T1l-2s; Mon, 27 Sep 2021 18:38:04 +0200 Date: Mon, 27 Sep 2021 18:38:04 +0200 From: Andrew Lunn To: Robert Marko Cc: gregory.clement@bootlin.com, sebastian.hesselbarth@gmail.com, robh+dt@kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 3/4] arm64: dts: marvell: espressobin-ultra: add PHY and switch reset pins Message-ID: References: <20210927154159.2168500-1-robert.marko@sartura.hr> <20210927154159.2168500-3-robert.marko@sartura.hr> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20210927154159.2168500-3-robert.marko@sartura.hr> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210927_093806_816979_DE289B93 X-CRM114-Status: GOOD ( 10.94 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, Sep 27, 2021 at 05:41:58PM +0200, Robert Marko wrote: > Both the Topaz switch and 88E1512 PHY have their reset and interrupts > connected to the SoC. > > So, define the Topaz and 88E1512 reset pins in the DTS. > > Defining the interrupt pins wont work as both the 88E1512 and the > Topaz switch uses active LOW IRQ signals but the A37xx GPIO controller > only supports edge triggers. > 88E1512 would require special setup anyway as its INT pin is shared with > the LED2 and you first need to configure it as INT. > > Signed-off-by: Robert Marko Reviewed-by: Andrew Lunn Andrew _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel