From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 66D0BC433F5 for ; Tue, 7 Dec 2021 16:05:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=7i73mWhJQv0n52YlBhytjw58oRdWchAbVEmlqQR3vGY=; b=g2RjlWRIdDa3zw DVrcLtDFiu4LIWYifET5OEk/rqUj8uN8fxP5Ago05TO09H1jfghiT8Z88XoEol/Dy3KK5zKYOEVEM 2KHVpiiNLeydoOTyZnqtvXSL1SxFDe7zt+AE+Q2fQYXt/dZIzGjr2b2+J0kSag2HQdKgaF+eI5Wkv fwgysKhmhDaPGO0oqkgdZ/LagikbGNkjknXckxv3i/L+jw5FY3dn90H1NVDudHH/LzicyTVarEE1H JRuKOAlWUDCQFMcBtDmZNO6Kqokos7bTQRxAEYGuT9/7wN4mnOuTUxZ4+Etwq7D7JhhCgrZkxyQv3 CGQW68EncTMm2pD4/xsg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mucwI-009NoE-FQ; Tue, 07 Dec 2021 16:03:34 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mucwE-009NnF-Tj for linux-arm-kernel@lists.infradead.org; Tue, 07 Dec 2021 16:03:32 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 8E84711D4; Tue, 7 Dec 2021 08:03:29 -0800 (PST) Received: from FVFF77S0Q05N (unknown [10.57.67.24]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 590DF3F5A1; Tue, 7 Dec 2021 08:03:28 -0800 (PST) Date: Tue, 7 Dec 2021 16:03:25 +0000 From: Mark Rutland To: Thierry Reding Cc: Will Deacon , Rob Herring , Jon Hunter , linux-tegra@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH 2/3] arm64: perf: Support Denver and Carmel PMUs Message-ID: References: <20211207150746.444478-1-thierry.reding@gmail.com> <20211207150746.444478-2-thierry.reding@gmail.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20211207150746.444478-2-thierry.reding@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211207_080331_037367_19BD4F95 X-CRM114-Status: GOOD ( 19.10 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, Dec 07, 2021 at 04:07:45PM +0100, Thierry Reding wrote: > From: Thierry Reding > > Add support for the NVIDIA Denver and Carmel PMUs using the generic > PMUv3 event map for now. > > Signed-off-by: Thierry Reding > --- > arch/arm64/kernel/perf_event.c | 14 ++++++++++++++ > 1 file changed, 14 insertions(+) > > diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c > index b4044469527e..8c8cf369c450 100644 > --- a/arch/arm64/kernel/perf_event.c > +++ b/arch/arm64/kernel/perf_event.c > @@ -1247,6 +1247,18 @@ static int armv8_vulcan_pmu_init(struct arm_pmu *cpu_pmu) > armv8_vulcan_map_event); > } > > +static int armv8_denver_pmu_init(struct arm_pmu *cpu_pmu) > +{ > + return armv8_pmu_init_nogroups(cpu_pmu, "armv8_nvidia_denver", > + armv8_pmuv3_map_event); > +} > + > +static int armv8_carmel_pmu_init(struct arm_pmu *cpu_pmu) > +{ > + return armv8_pmu_init_nogroups(cpu_pmu, "armv8_nvidia_carmel", > + armv8_pmuv3_map_event); > +} > + > static const struct of_device_id armv8_pmu_of_device_ids[] = { > {.compatible = "arm,armv8-pmuv3", .data = armv8_pmuv3_init}, > {.compatible = "arm,cortex-a34-pmu", .data = armv8_a34_pmu_init}, > @@ -1265,6 +1277,8 @@ static const struct of_device_id armv8_pmu_of_device_ids[] = { > {.compatible = "arm,neoverse-n1-pmu", .data = armv8_n1_pmu_init}, > {.compatible = "cavium,thunder-pmu", .data = armv8_thunder_pmu_init}, > {.compatible = "brcm,vulcan-pmu", .data = armv8_vulcan_pmu_init}, > + {.compatible = "nvidia,denver-pmu", .data = armv8_denver_pmu_init}, > + {.compatible = "nvidia,carmel-pmu", .data = armv8_carmel_pmu_init}, Super trivial nit, but could we please organise this alphabetically (i.e. with carmel first?) With that: Acked-by: Mark Rutland I see now that we messed up the order of "cavium,thunder-pmu" and "brcm,vulcan-pmu", but otherwise this is ordered, and it's be nice to keep it that way. I can fix the order of those two in a separate patch. Thanks, Mark. > {}, > }; > > -- > 2.33.1 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel