From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4863BC433F5 for ; Tue, 7 Dec 2021 18:45:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=wNpNnNYLBEAr5gj3dlVHnIisc/gqIxZZ+QZEQD/xyoA=; b=O0qHB4T3nukNVA 3iavBd2POrGosxoDFxCohmIg18XmMpuC6wLiWmPUS1dxjrvPGV1dMNPykobsNlR1hl6Y698T9ynMt axpEzRjqQ4D6FMn+9PJdxckF4hsHIKNRkGLd41KkKzMONLy8i8XBb0u28VZNeCIjcY5WE6ha6Et+S 0lsM2jwnVcfb0l3JhOkCxPpEhMADBTZy5RuO2iXAv+m2RU5SAyaYwOm98ncA9lyAZATEOOaHNm0SF NE0qzy4ZGFlsRsPtJBmYVbmRVSmHgXpVy7QTSZi8ygdWENXxb1KVzhpWjHtWPtB6p8ouV8P/sgTZu m7srShLPf8PceAJm87IQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mufRr-009ple-Cj; Tue, 07 Dec 2021 18:44:19 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mufRn-009pks-7k for linux-arm-kernel@lists.infradead.org; Tue, 07 Dec 2021 18:44:16 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id BB2741063; Tue, 7 Dec 2021 10:44:13 -0800 (PST) Received: from FVFF77S0Q05N (unknown [10.57.67.24]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 55D843F73B; Tue, 7 Dec 2021 10:44:12 -0800 (PST) Date: Tue, 7 Dec 2021 18:44:06 +0000 From: Mark Rutland To: Robin Murphy Cc: will@kernel.org, catalin.marinas@arm.com, robh+dt@kernel.org, suzuki.poulose@arm.com, thierry.reding@gmail.com, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org Subject: Re: [PATCH 3/5] arm64: perf: Support new DT compatibles Message-ID: References: <579f301dbf5347d20cfdf49480b850cba82c1ca2.1638900542.git.robin.murphy@arm.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <579f301dbf5347d20cfdf49480b850cba82c1ca2.1638900542.git.robin.murphy@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211207_104415_399609_12CE0F01 X-CRM114-Status: GOOD ( 16.81 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, Dec 07, 2021 at 06:20:41PM +0000, Robin Murphy wrote: > Wire up the new DT compatibles so we can present appropriate > PMU names to userspace for the latest and greatest CPUs. > > Signed-off-by: Robin Murphy > --- > arch/arm64/kernel/perf_event.c | 36 ++++++++++++++++++++++++++++++++++ > 1 file changed, 36 insertions(+) > > diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c > index 57720372da62..3fe4dcfc28d4 100644 > --- a/arch/arm64/kernel/perf_event.c > +++ b/arch/arm64/kernel/perf_event.c > @@ -1215,6 +1215,26 @@ static int armv8_a78_pmu_init(struct arm_pmu *cpu_pmu) > return armv8_pmu_init_nogroups(cpu_pmu, "armv8_cortex_a78", NULL); > } > > +static int armv9_a510_pmu_init(struct arm_pmu *cpu_pmu) > +{ > + return armv8_pmu_init_nogroups(cpu_pmu, "armv9_cortex_a510", NULL); > +} > + > +static int armv9_a710_pmu_init(struct arm_pmu *cpu_pmu) > +{ > + return armv8_pmu_init_nogroups(cpu_pmu, "armv9_cortex_a710", NULL); > +} > + > +static int armv8_x1_pmu_init(struct arm_pmu *cpu_pmu) > +{ > + return armv8_pmu_init_nogroups(cpu_pmu, "armv8_cortex_x1", NULL); > +} > + > +static int armv9_x2_pmu_init(struct arm_pmu *cpu_pmu) > +{ > + return armv8_pmu_init_nogroups(cpu_pmu, "armv9_cortex_x2", NULL); > +} I wonder if it'd be better to do something like: #define PMU_INIT_SIMPLE(name) \ static int name##_pmu_init(struct arm_pmu *cpu_pmu) \ { return armv8_pmu_init_nogroups(cpu_pmu, #name, NULL); \ } PMU_INIT_SIMPLE(armv9_cortex_a510) PMU_INIT_SIMPLE(armv9_cortex_a710) PMU_INIT_SIMPLE(armv8_xortex_x1) PMU_INIT_SIMPLE(armv9_xortex_x2) ... and fix up the armv8_pmu_of_device_ids[] table to use the longer init names that results in? Otherwise, looks good to me. Thanks, Mark. > + > static int armv8_e1_pmu_init(struct arm_pmu *cpu_pmu) > { > return armv8_pmu_init_nogroups(cpu_pmu, "armv8_neoverse_e1", NULL); > @@ -1225,6 +1245,16 @@ static int armv8_n1_pmu_init(struct arm_pmu *cpu_pmu) > return armv8_pmu_init_nogroups(cpu_pmu, "armv8_neoverse_n1", NULL); > } > > +static int armv9_n2_pmu_init(struct arm_pmu *cpu_pmu) > +{ > + return armv8_pmu_init_nogroups(cpu_pmu, "armv9_neoverse_n2", NULL); > +} > + > +static int armv8_v1_pmu_init(struct arm_pmu *cpu_pmu) > +{ > + return armv8_pmu_init_nogroups(cpu_pmu, "armv8_neoverse_v1", NULL); > +} > + > static int armv8_thunder_pmu_init(struct arm_pmu *cpu_pmu) > { > return armv8_pmu_init_nogroups(cpu_pmu, "armv8_cavium_thunder", > @@ -1251,8 +1281,14 @@ static const struct of_device_id armv8_pmu_of_device_ids[] = { > {.compatible = "arm,cortex-a76-pmu", .data = armv8_a76_pmu_init}, > {.compatible = "arm,cortex-a77-pmu", .data = armv8_a77_pmu_init}, > {.compatible = "arm,cortex-a78-pmu", .data = armv8_a78_pmu_init}, > + {.compatible = "arm,cortex-a510-pmu", .data = armv9_a510_pmu_init}, > + {.compatible = "arm,cortex-a710-pmu", .data = armv9_a710_pmu_init}, > + {.compatible = "arm,cortex-x1-pmu", .data = armv8_x1_pmu_init}, > + {.compatible = "arm,cortex-x2-pmu", .data = armv9_x2_pmu_init}, > {.compatible = "arm,neoverse-e1-pmu", .data = armv8_e1_pmu_init}, > {.compatible = "arm,neoverse-n1-pmu", .data = armv8_n1_pmu_init}, > + {.compatible = "arm,neoverse-n2-pmu", .data = armv9_n2_pmu_init}, > + {.compatible = "arm,neoverse-v1-pmu", .data = armv8_v1_pmu_init}, > {.compatible = "cavium,thunder-pmu", .data = armv8_thunder_pmu_init}, > {.compatible = "brcm,vulcan-pmu", .data = armv8_vulcan_pmu_init}, > {}, > -- > 2.28.0.dirty > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel