From: Rob Herring <robh@kernel.org>
To: Evgeny Boger <boger@wirenboard.com>
Cc: Maxime Ripard <mripard@kernel.org>, Chen-Yu Tsai <wens@csie.org>,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
linux-sunxi@lists.linux.dev
Subject: Re: [PATCH v3 3/3] dts: r40: add second ethernet support
Date: Sun, 28 Nov 2021 18:26:58 -0600 [thread overview]
Message-ID: <YaQeUqF0P6waOcqQ@robh.at.kernel.org> (raw)
In-Reply-To: <20211121195337.230475-4-boger@wirenboard.com>
On Sun, Nov 21, 2021 at 10:53:37PM +0300, Evgeny Boger wrote:
> R40 (aka V40, A40i, T3) has two different Ethernet IP
> called EMAC and GMAC.
> EMAC only support 10/100 Mbit in MII mode,
> while GMAC support both 10/100 (MII) and 10/100/1000 (RGMII).
>
> In contrast to A10/A20 where GMAC and EMAC share the same pins
> making EMAC somewhat pointless, on R40 EMAC can be routed to port H.
> Both EMAC (on port H) and GMAC (on port A)
> can be then enabled at the same time, allowing for two ethernet ports.
>
> Signed-off-by: Evgeny Boger <boger@wirenboard.com>
> ---
> arch/arm/boot/dts/sun8i-r40.dtsi | 50 ++++++++++++++++++++++++++++++++
> 1 file changed, 50 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi
> index 1d87fc0c24ee..19ea33421c63 100644
> --- a/arch/arm/boot/dts/sun8i-r40.dtsi
> +++ b/arch/arm/boot/dts/sun8i-r40.dtsi
> @@ -217,6 +217,20 @@ syscon: system-control@1c00000 {
> #size-cells = <1>;
> ranges;
>
> + sram_a: sram@0 {
> + compatible = "mmio-sram";
> + reg = <0x00000000 0xc000>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0 0x00000000 0xc000>;
> +
> + emac_sram: sram-section@8000 {
> + compatible = "allwinner,sun4i-a10-sram-a3-a4";
> + reg = <0x8000 0x4000>;
> + status = "okay";
'okay' is the default, so you don't need it.
> + };
> + };
> +
> sram_c: sram@1d00000 {
> compatible = "mmio-sram";
> reg = <0x01d00000 0xd0000>;
> @@ -543,6 +557,24 @@ gmac_rgmii_pins: gmac-rgmii-pins {
> drive-strength = <40>;
> };
>
> + emac_pa_pins: emac-pa-pins {
> + pins = "PA0", "PA1", "PA2",
> + "PA3", "PA4", "PA5", "PA6",
> + "PA7", "PA8", "PA9", "PA10",
> + "PA11", "PA12", "PA13", "PA14",
> + "PA15", "PA16";
> + function = "emac";
> + };
> +
> + emac_ph_pins: emac-ph-pins {
> + pins = "PH8", "PH9", "PH10", "PH11",
> + "PH14", "PH15", "PH16", "PH17",
> + "PH18","PH19", "PH20", "PH21",
> + "PH22", "PH23", "PH24", "PH25",
> + "PH26", "PH27";
> + function = "emac";
> + };
> +
> i2c0_pins: i2c0-pins {
> pins = "PB0", "PB1";
> function = "i2c0";
> @@ -980,6 +1012,24 @@ gmac_mdio: mdio {
> };
> };
>
> + emac: ethernet@1c0b000 {
> + compatible = "allwinner,sun4i-r40-emac";
> + reg = <0x01c0b000 0x1000>;
> + interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&ccu CLK_BUS_EMAC>;
> + resets = <&ccu RST_BUS_EMAC>;
> + allwinner,sram = <&emac_sram 1>;
> + status = "disabled";
> + };
> +
> + emac_mdio: mdio@1c0b080 {
> + compatible = "allwinner,sun4i-a10-mdio";
> + reg = <0x01c0b080 0x14>;
> + status = "disabled";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> mbus: dram-controller@1c62000 {
> compatible = "allwinner,sun8i-r40-mbus";
> reg = <0x01c62000 0x1000>;
> --
> 2.25.1
>
>
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prev parent reply other threads:[~2021-11-29 0:33 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-21 19:53 [PATCH v3 0/3] sun8i: r40: second ethernet support Evgeny Boger
2021-11-21 19:53 ` [PATCH v3 1/3] net: allwinner: reset control support Evgeny Boger
2021-11-22 9:13 ` Maxime Ripard
2021-11-21 19:53 ` [PATCH v3 2/3] dt-bindings: net: support for Allwinner R40 EMAC controller Evgeny Boger
2021-11-29 0:27 ` Rob Herring
2021-11-21 19:53 ` [PATCH v3 3/3] dts: r40: add second ethernet support Evgeny Boger
2021-11-29 0:26 ` Rob Herring [this message]
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