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[201.253.22.208]) by smtp.gmail.com with ESMTPSA id v7sm10324560uaj.13.2021.11.30.04.24.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 30 Nov 2021 04:24:47 -0800 (PST) Date: Tue, 30 Nov 2021 09:24:42 -0300 From: Ezequiel Garcia To: Jernej Skrabec Cc: linux-media@vger.kernel.org, nicolas.dufresne@collabora.com, mchehab@kernel.org, robh+dt@kernel.org, mripard@kernel.org, wens@csie.org, p.zabel@pengutronix.de, andrzej.p@collabora.com, gregkh@linuxfoundation.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev Subject: Re: [PATCH v2 8/9] media: hantro: Add support for Allwinner H6 Message-ID: References: <20211129182633.480021-1-jernej.skrabec@gmail.com> <20211129182633.480021-9-jernej.skrabec@gmail.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20211129182633.480021-9-jernej.skrabec@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211130_042449_934699_2D97CACE X-CRM114-Status: GOOD ( 28.67 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, Nov 29, 2021 at 07:26:32PM +0100, Jernej Skrabec wrote: > Allwinner H6 has a Hantro G2 core used for VP9 decoding. It's not clear > at this time if HEVC is also supported or not. > > Signed-off-by: Jernej Skrabec Reviewed-by: Ezequiel Garcia Thanks! > --- > drivers/staging/media/hantro/Kconfig | 10 ++- > drivers/staging/media/hantro/Makefile | 3 + > drivers/staging/media/hantro/hantro_drv.c | 3 + > drivers/staging/media/hantro/hantro_hw.h | 1 + > drivers/staging/media/hantro/sunxi_vpu_hw.c | 86 +++++++++++++++++++++ > 5 files changed, 102 insertions(+), 1 deletion(-) > create mode 100644 drivers/staging/media/hantro/sunxi_vpu_hw.c > > diff --git a/drivers/staging/media/hantro/Kconfig b/drivers/staging/media/hantro/Kconfig > index 00a57d88c92e..3c5d833322c8 100644 > --- a/drivers/staging/media/hantro/Kconfig > +++ b/drivers/staging/media/hantro/Kconfig > @@ -1,7 +1,7 @@ > # SPDX-License-Identifier: GPL-2.0 > config VIDEO_HANTRO > tristate "Hantro VPU driver" > - depends on ARCH_MXC || ARCH_ROCKCHIP || ARCH_AT91 || COMPILE_TEST > + depends on ARCH_MXC || ARCH_ROCKCHIP || ARCH_AT91 || ARCH_SUNXI || COMPILE_TEST > depends on VIDEO_DEV && VIDEO_V4L2 > select MEDIA_CONTROLLER > select MEDIA_CONTROLLER_REQUEST_API > @@ -40,3 +40,11 @@ config VIDEO_HANTRO_ROCKCHIP > default y > help > Enable support for RK3288, RK3328, and RK3399 SoCs. > + > +config VIDEO_HANTRO_SUNXI > + bool "Hantro VPU Allwinner support" > + depends on VIDEO_HANTRO > + depends on ARCH_SUNXI || COMPILE_TEST > + default y > + help > + Enable support for H6 SoC. > diff --git a/drivers/staging/media/hantro/Makefile b/drivers/staging/media/hantro/Makefile > index 28af0a1ee4bf..ebd5ede7bef7 100644 > --- a/drivers/staging/media/hantro/Makefile > +++ b/drivers/staging/media/hantro/Makefile > @@ -33,3 +33,6 @@ hantro-vpu-$(CONFIG_VIDEO_HANTRO_SAMA5D4) += \ > > hantro-vpu-$(CONFIG_VIDEO_HANTRO_ROCKCHIP) += \ > rockchip_vpu_hw.o > + > +hantro-vpu-$(CONFIG_VIDEO_HANTRO_SUNXI) += \ > + sunxi_vpu_hw.o > diff --git a/drivers/staging/media/hantro/hantro_drv.c b/drivers/staging/media/hantro/hantro_drv.c > index 33bf78be145b..6a51f39dde56 100644 > --- a/drivers/staging/media/hantro/hantro_drv.c > +++ b/drivers/staging/media/hantro/hantro_drv.c > @@ -620,6 +620,9 @@ static const struct of_device_id of_hantro_match[] = { > #endif > #ifdef CONFIG_VIDEO_HANTRO_SAMA5D4 > { .compatible = "microchip,sama5d4-vdec", .data = &sama5d4_vdec_variant, }, > +#endif > +#ifdef CONFIG_VIDEO_HANTRO_SUNXI > + { .compatible = "allwinner,sun50i-h6-vpu-g2", .data = &sunxi_vpu_variant, }, > #endif > { /* sentinel */ } > }; > diff --git a/drivers/staging/media/hantro/hantro_hw.h b/drivers/staging/media/hantro/hantro_hw.h > index c33b1f5df37b..c92a6ec4b187 100644 > --- a/drivers/staging/media/hantro/hantro_hw.h > +++ b/drivers/staging/media/hantro/hantro_hw.h > @@ -308,6 +308,7 @@ extern const struct hantro_variant rk3288_vpu_variant; > extern const struct hantro_variant rk3328_vpu_variant; > extern const struct hantro_variant rk3399_vpu_variant; > extern const struct hantro_variant sama5d4_vdec_variant; > +extern const struct hantro_variant sunxi_vpu_variant; > > extern const struct hantro_postproc_ops hantro_g1_postproc_ops; > extern const struct hantro_postproc_ops hantro_g2_postproc_ops; > diff --git a/drivers/staging/media/hantro/sunxi_vpu_hw.c b/drivers/staging/media/hantro/sunxi_vpu_hw.c > new file mode 100644 > index 000000000000..90633406c4eb > --- /dev/null > +++ b/drivers/staging/media/hantro/sunxi_vpu_hw.c > @@ -0,0 +1,86 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Allwinner Hantro G2 VPU codec driver > + * > + * Copyright (C) 2021 Jernej Skrabec > + */ > + > +#include > + > +#include "hantro.h" > + > +static const struct hantro_fmt sunxi_vpu_postproc_fmts[] = { > + { > + .fourcc = V4L2_PIX_FMT_NV12, > + .codec_mode = HANTRO_MODE_NONE, > + .postprocessed = true, > + }, > +}; > + > +static const struct hantro_fmt sunxi_vpu_dec_fmts[] = { > + { > + .fourcc = V4L2_PIX_FMT_NV12_4L4, > + .codec_mode = HANTRO_MODE_NONE, > + }, > + { > + .fourcc = V4L2_PIX_FMT_VP9_FRAME, > + .codec_mode = HANTRO_MODE_VP9_DEC, > + .max_depth = 2, > + .frmsize = { > + .min_width = 48, > + .max_width = 3840, > + .step_width = MB_DIM, > + .min_height = 48, > + .max_height = 2160, > + .step_height = MB_DIM, > + }, > + }, > +}; > + > +static int sunxi_vpu_hw_init(struct hantro_dev *vpu) > +{ > + clk_set_rate(vpu->clocks[0].clk, 300000000); > + > + return 0; > +} > + > +static void sunxi_vpu_reset(struct hantro_ctx *ctx) > +{ > + struct hantro_dev *vpu = ctx->dev; > + > + reset_control_reset(vpu->resets); > +} > + > +static const struct hantro_codec_ops sunxi_vpu_codec_ops[] = { > + [HANTRO_MODE_VP9_DEC] = { > + .run = hantro_g2_vp9_dec_run, > + .done = hantro_g2_vp9_dec_done, > + .reset = sunxi_vpu_reset, > + .init = hantro_vp9_dec_init, > + .exit = hantro_vp9_dec_exit, > + }, > +}; > + > +static const struct hantro_irq sunxi_irqs[] = { > + { NULL, hantro_g2_irq }, > +}; > + > +static const char * const sunxi_clk_names[] = { "mod", "bus" }; > + > +const struct hantro_variant sunxi_vpu_variant = { > + .dec_fmts = sunxi_vpu_dec_fmts, > + .num_dec_fmts = ARRAY_SIZE(sunxi_vpu_dec_fmts), > + .postproc_fmts = sunxi_vpu_postproc_fmts, > + .num_postproc_fmts = ARRAY_SIZE(sunxi_vpu_postproc_fmts), > + .postproc_ops = &hantro_g2_postproc_ops, > + .codec = HANTRO_VP9_DECODER, > + .codec_ops = sunxi_vpu_codec_ops, > + .init = sunxi_vpu_hw_init, > + .irqs = sunxi_irqs, > + .num_irqs = ARRAY_SIZE(sunxi_irqs), > + .clk_names = sunxi_clk_names, > + .num_clocks = ARRAY_SIZE(sunxi_clk_names), > + .double_buffer = 1, > + .legacy_regs = 1, > + .late_postproc = 1, > +}; > -- > 2.34.1 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel