From: Mark Rutland <mark.rutland@arm.com>
To: Vladimir Murzin <vladimir.murzin@arm.com>
Cc: linux-arm-kernel@lists.infradead.org, linux@armlinux.org.uk,
maz@kernel.org, Ard Biesheuvel <ardb@kernel.org>,
Arnd Bergmann <arnd@arndb.de>
Subject: Re: [PATCH 2/2] irqchip: nvic: Use GENERIC_IRQ_MULTI_HANDLER
Date: Wed, 1 Dec 2021 11:58:51 +0000 [thread overview]
Message-ID: <Yadje3TcsDRMqMVS@FVFF77S0Q05N> (raw)
In-Reply-To: <20211201110259.84857-2-vladimir.murzin@arm.com>
Adding Ard and Arnd, since this looks like it might interact with their series
moving other platforms to GENERIC_IRQ_MULTI_HANDLER:
https://lore.kernel.org/linux-arm-kernel/20211130125901.3054-1-ardb@kernel.org/
On Wed, Dec 01, 2021 at 11:02:59AM +0000, Vladimir Murzin wrote:
> Rather then restructuring the ARMv7M entrly logic per TODO, just move
> NVIC to GENERIC_IRQ_MULTI_HANDLER.
>
> Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
> ---
> arch/arm/include/asm/v7m.h | 3 ++-
> arch/arm/kernel/entry-v7m.S | 10 +++-------
> drivers/irqchip/Kconfig | 1 +
> drivers/irqchip/irq-nvic.c | 22 +++++-----------------
> 4 files changed, 11 insertions(+), 25 deletions(-)
Nice; thanks for doing this!
FWIW:
Acked-by: Mark Rutland <mark.rutland@arm.com>
Mark.
>
> diff --git a/arch/arm/include/asm/v7m.h b/arch/arm/include/asm/v7m.h
> index 2cb00d1..4512f7e 100644
> --- a/arch/arm/include/asm/v7m.h
> +++ b/arch/arm/include/asm/v7m.h
> @@ -13,6 +13,7 @@
> #define V7M_SCB_ICSR_PENDSVSET (1 << 28)
> #define V7M_SCB_ICSR_PENDSVCLR (1 << 27)
> #define V7M_SCB_ICSR_RETTOBASE (1 << 11)
> +#define V7M_SCB_ICSR_VECTACTIVE 0x000001ff
>
> #define V7M_SCB_VTOR 0x08
>
> @@ -38,7 +39,7 @@
> #define V7M_SCB_SHCSR_MEMFAULTENA (1 << 16)
>
> #define V7M_xPSR_FRAMEPTRALIGN 0x00000200
> -#define V7M_xPSR_EXCEPTIONNO 0x000001ff
> +#define V7M_xPSR_EXCEPTIONNO V7M_SCB_ICSR_VECTACTIVE
>
> /*
> * When branching to an address that has bits [31:28] == 0xf an exception return
> diff --git a/arch/arm/kernel/entry-v7m.S b/arch/arm/kernel/entry-v7m.S
> index 7bde93c..520dd43 100644
> --- a/arch/arm/kernel/entry-v7m.S
> +++ b/arch/arm/kernel/entry-v7m.S
> @@ -39,14 +39,10 @@ __irq_entry:
> @
> @ Invoke the IRQ handler
> @
> - mrs r0, ipsr
> - ldr r1, =V7M_xPSR_EXCEPTIONNO
> - and r0, r1
> - sub r0, #16
> - mov r1, sp
> + mov r0, sp
> stmdb sp!, {lr}
> - @ routine called with r0 = irq number, r1 = struct pt_regs *
> - bl nvic_handle_irq
> + @ routine called with r0 = struct pt_regs *
> + bl generic_handle_arch_irq
>
> pop {lr}
> @
> diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
> index 7038957..488eaa1 100644
> --- a/drivers/irqchip/Kconfig
> +++ b/drivers/irqchip/Kconfig
> @@ -58,6 +58,7 @@ config ARM_NVIC
> bool
> select IRQ_DOMAIN_HIERARCHY
> select GENERIC_IRQ_CHIP
> + select GENERIC_IRQ_MULTI_HANDLER
>
> config ARM_VIC
> bool
> diff --git a/drivers/irqchip/irq-nvic.c b/drivers/irqchip/irq-nvic.c
> index ba4759b..125f9c1 100644
> --- a/drivers/irqchip/irq-nvic.c
> +++ b/drivers/irqchip/irq-nvic.c
> @@ -37,25 +37,12 @@
>
> static struct irq_domain *nvic_irq_domain;
>
> -static void __nvic_handle_irq(irq_hw_number_t hwirq)
> +static void __irq_entry nvic_handle_irq(struct pt_regs *regs)
> {
> - generic_handle_domain_irq(nvic_irq_domain, hwirq);
> -}
> + unsigned long icsr = readl_relaxed(BASEADDR_V7M_SCB + V7M_SCB_ICSR);
> + irq_hw_number_t hwirq = (icsr & V7M_SCB_ICSR_VECTACTIVE) - 16;
>
> -/*
> - * TODO: restructure the ARMv7M entry logic so that this entry logic can live
> - * in arch code.
> - */
> -asmlinkage void __exception_irq_entry
> -nvic_handle_irq(irq_hw_number_t hwirq, struct pt_regs *regs)
> -{
> - struct pt_regs *old_regs;
> -
> - irq_enter();
> - old_regs = set_irq_regs(regs);
> - __nvic_handle_irq(hwirq);
> - set_irq_regs(old_regs);
> - irq_exit();
> + generic_handle_domain_irq(nvic_irq_domain, hwirq);
> }
>
> static int nvic_irq_domain_alloc(struct irq_domain *domain, unsigned int virq,
> @@ -141,6 +128,7 @@ static int __init nvic_of_init(struct device_node *node,
> for (i = 0; i < irqs; i += 4)
> writel_relaxed(0, nvic_base + NVIC_IPR + i);
>
> + set_handle_irq(nvic_handle_irq);
> return 0;
> }
> IRQCHIP_DECLARE(armv7m_nvic, "arm,armv7m-nvic", nvic_of_init);
> --
> 2.7.4
>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-12-01 12:00 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-01 11:02 [PATCH 1/2] irqchip: nvic: Fix offset for Interrupt Priority Offsets Vladimir Murzin
2021-12-01 11:02 ` [PATCH 2/2] irqchip: nvic: Use GENERIC_IRQ_MULTI_HANDLER Vladimir Murzin
2021-12-01 11:58 ` Mark Rutland [this message]
2021-12-01 12:30 ` Arnd Bergmann
2021-12-01 13:43 ` Vladimir Murzin
2021-12-01 14:05 ` Arnd Bergmann
2021-12-01 14:15 ` Vladimir Murzin
2021-12-01 15:13 ` Arnd Bergmann
2021-12-01 15:51 ` Vladimir Murzin
2021-12-02 8:35 ` Ard Biesheuvel
2021-12-02 9:05 ` Marc Zyngier
2021-12-02 9:23 ` Arnd Bergmann
2021-12-02 9:33 ` Vladimir Murzin
2021-12-02 9:45 ` Arnd Bergmann
2021-12-02 11:05 ` Ard Biesheuvel
2021-12-02 14:12 ` Vladimir Murzin
2021-12-02 16:46 ` Ard Biesheuvel
2021-12-02 18:02 ` Vladimir Murzin
2021-12-02 18:38 ` Ard Biesheuvel
2021-12-02 20:27 ` Jesse Taube
2021-12-02 9:31 ` Marc Zyngier
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=Yadje3TcsDRMqMVS@FVFF77S0Q05N \
--to=mark.rutland@arm.com \
--cc=ardb@kernel.org \
--cc=arnd@arndb.de \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux@armlinux.org.uk \
--cc=maz@kernel.org \
--cc=vladimir.murzin@arm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).