From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D2CB2C433EF for ; Wed, 1 Dec 2021 12:00:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=pWt16MXmluMyIaSTsJWMPLWGnpb++nSvIIwDR2BXVzs=; b=LzBejt3qZDUBh0 xyjaZl/6wC5BWftDdAo+2zaOMQlsT1+8/WCFH0Em8brEq5NJ5zO8Rl5Hu6/nGpkEBBkJOaxwVA2b0 s0a3Vgh4XmEU7HEZichsyUs9eHwAVMkUTTb9HYvLSspWSCqDhOqpONDiAyv4QH3mS8PwkvpypfXgH 7ErMY6M2e1rK/oPTG35DfxXo11BlqcavRVmvpp72fBDvv4PPBB8lUSkE2ja6b/SifyM+b5ZECfv8o dFpJSfOwSiaqveCqpgis2JBIseBGqVrDWFF0TaXnWeaobhNZcpHc/6TchpnSqg2v0A9JiacQhDJCu 8KatIM0pwzqeHIkh+33w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1msOGK-008IYV-Jd; Wed, 01 Dec 2021 11:59:00 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1msOGG-008IXr-8z for linux-arm-kernel@lists.infradead.org; Wed, 01 Dec 2021 11:58:58 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E3A8D1476; Wed, 1 Dec 2021 03:58:54 -0800 (PST) Received: from FVFF77S0Q05N (unknown [10.57.65.205]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id CB5E03F694; Wed, 1 Dec 2021 03:58:53 -0800 (PST) Date: Wed, 1 Dec 2021 11:58:51 +0000 From: Mark Rutland To: Vladimir Murzin Cc: linux-arm-kernel@lists.infradead.org, linux@armlinux.org.uk, maz@kernel.org, Ard Biesheuvel , Arnd Bergmann Subject: Re: [PATCH 2/2] irqchip: nvic: Use GENERIC_IRQ_MULTI_HANDLER Message-ID: References: <20211201110259.84857-1-vladimir.murzin@arm.com> <20211201110259.84857-2-vladimir.murzin@arm.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20211201110259.84857-2-vladimir.murzin@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211201_035856_446339_FDB2B5ED X-CRM114-Status: GOOD ( 21.86 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Adding Ard and Arnd, since this looks like it might interact with their series moving other platforms to GENERIC_IRQ_MULTI_HANDLER: https://lore.kernel.org/linux-arm-kernel/20211130125901.3054-1-ardb@kernel.org/ On Wed, Dec 01, 2021 at 11:02:59AM +0000, Vladimir Murzin wrote: > Rather then restructuring the ARMv7M entrly logic per TODO, just move > NVIC to GENERIC_IRQ_MULTI_HANDLER. > > Signed-off-by: Vladimir Murzin > --- > arch/arm/include/asm/v7m.h | 3 ++- > arch/arm/kernel/entry-v7m.S | 10 +++------- > drivers/irqchip/Kconfig | 1 + > drivers/irqchip/irq-nvic.c | 22 +++++----------------- > 4 files changed, 11 insertions(+), 25 deletions(-) Nice; thanks for doing this! FWIW: Acked-by: Mark Rutland Mark. > > diff --git a/arch/arm/include/asm/v7m.h b/arch/arm/include/asm/v7m.h > index 2cb00d1..4512f7e 100644 > --- a/arch/arm/include/asm/v7m.h > +++ b/arch/arm/include/asm/v7m.h > @@ -13,6 +13,7 @@ > #define V7M_SCB_ICSR_PENDSVSET (1 << 28) > #define V7M_SCB_ICSR_PENDSVCLR (1 << 27) > #define V7M_SCB_ICSR_RETTOBASE (1 << 11) > +#define V7M_SCB_ICSR_VECTACTIVE 0x000001ff > > #define V7M_SCB_VTOR 0x08 > > @@ -38,7 +39,7 @@ > #define V7M_SCB_SHCSR_MEMFAULTENA (1 << 16) > > #define V7M_xPSR_FRAMEPTRALIGN 0x00000200 > -#define V7M_xPSR_EXCEPTIONNO 0x000001ff > +#define V7M_xPSR_EXCEPTIONNO V7M_SCB_ICSR_VECTACTIVE > > /* > * When branching to an address that has bits [31:28] == 0xf an exception return > diff --git a/arch/arm/kernel/entry-v7m.S b/arch/arm/kernel/entry-v7m.S > index 7bde93c..520dd43 100644 > --- a/arch/arm/kernel/entry-v7m.S > +++ b/arch/arm/kernel/entry-v7m.S > @@ -39,14 +39,10 @@ __irq_entry: > @ > @ Invoke the IRQ handler > @ > - mrs r0, ipsr > - ldr r1, =V7M_xPSR_EXCEPTIONNO > - and r0, r1 > - sub r0, #16 > - mov r1, sp > + mov r0, sp > stmdb sp!, {lr} > - @ routine called with r0 = irq number, r1 = struct pt_regs * > - bl nvic_handle_irq > + @ routine called with r0 = struct pt_regs * > + bl generic_handle_arch_irq > > pop {lr} > @ > diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig > index 7038957..488eaa1 100644 > --- a/drivers/irqchip/Kconfig > +++ b/drivers/irqchip/Kconfig > @@ -58,6 +58,7 @@ config ARM_NVIC > bool > select IRQ_DOMAIN_HIERARCHY > select GENERIC_IRQ_CHIP > + select GENERIC_IRQ_MULTI_HANDLER > > config ARM_VIC > bool > diff --git a/drivers/irqchip/irq-nvic.c b/drivers/irqchip/irq-nvic.c > index ba4759b..125f9c1 100644 > --- a/drivers/irqchip/irq-nvic.c > +++ b/drivers/irqchip/irq-nvic.c > @@ -37,25 +37,12 @@ > > static struct irq_domain *nvic_irq_domain; > > -static void __nvic_handle_irq(irq_hw_number_t hwirq) > +static void __irq_entry nvic_handle_irq(struct pt_regs *regs) > { > - generic_handle_domain_irq(nvic_irq_domain, hwirq); > -} > + unsigned long icsr = readl_relaxed(BASEADDR_V7M_SCB + V7M_SCB_ICSR); > + irq_hw_number_t hwirq = (icsr & V7M_SCB_ICSR_VECTACTIVE) - 16; > > -/* > - * TODO: restructure the ARMv7M entry logic so that this entry logic can live > - * in arch code. > - */ > -asmlinkage void __exception_irq_entry > -nvic_handle_irq(irq_hw_number_t hwirq, struct pt_regs *regs) > -{ > - struct pt_regs *old_regs; > - > - irq_enter(); > - old_regs = set_irq_regs(regs); > - __nvic_handle_irq(hwirq); > - set_irq_regs(old_regs); > - irq_exit(); > + generic_handle_domain_irq(nvic_irq_domain, hwirq); > } > > static int nvic_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, > @@ -141,6 +128,7 @@ static int __init nvic_of_init(struct device_node *node, > for (i = 0; i < irqs; i += 4) > writel_relaxed(0, nvic_base + NVIC_IPR + i); > > + set_handle_irq(nvic_handle_irq); > return 0; > } > IRQCHIP_DECLARE(armv7m_nvic, "arm,armv7m-nvic", nvic_of_init); > -- > 2.7.4 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel