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From: Mark Rutland <mark.rutland@arm.com>
To: Robin Murphy <robin.murphy@arm.com>
Cc: will@kernel.org, catalin.marinas@arm.com, robh+dt@kernel.org,
	suzuki.poulose@arm.com, thierry.reding@gmail.com,
	linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org
Subject: Re: [PATCH 2/5] arm64: perf: Simplify registration boilerplate
Date: Tue, 14 Dec 2021 13:38:22 +0000	[thread overview]
Message-ID: <YbieTvYTEJUpgbUL@FVFF77S0Q05N> (raw)
In-Reply-To: <487243cf1a402d8b23bc517f271225fefe3d0e42.1638900542.git.robin.murphy@arm.com>

On Tue, Dec 07, 2021 at 06:20:40PM +0000, Robin Murphy wrote:
> The arm_pmu framework requires map_event to be non-NULL, so let
> armv8_pmu_init() treat NULL as a default value for the generic PMUv3
> event map and simplify the boilerplate in the callers a bit.
> 
> Signed-off-by: Robin Murphy <robin.murphy@arm.com>
> ---
>  arch/arm64/kernel/perf_event.c | 32 +++++++++++---------------------
>  1 file changed, 11 insertions(+), 21 deletions(-)
> 
> diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c
> index b4044469527e..57720372da62 100644
> --- a/arch/arm64/kernel/perf_event.c
> +++ b/arch/arm64/kernel/perf_event.c
> @@ -1128,7 +1128,7 @@ static int armv8_pmu_init(struct arm_pmu *cpu_pmu, char *name,
>  	cpu_pmu->filter_match		= armv8pmu_filter_match;
>  
>  	cpu_pmu->name			= name;
> -	cpu_pmu->map_event		= map_event;
> +	cpu_pmu->map_event		= map_event ?: armv8_pmuv3_map_event;
>  	cpu_pmu->attr_groups[ARMPMU_ATTR_GROUP_EVENTS] = events ?
>  			events : &armv8_pmuv3_events_attr_group;
>  	cpu_pmu->attr_groups[ARMPMU_ATTR_GROUP_FORMATS] = format ?

Acked-by: Mark Rutland <mark.rutland@arm.com>

I'll leave it to will to pick this.

Mark.

> @@ -1147,14 +1147,12 @@ static int armv8_pmu_init_nogroups(struct arm_pmu *cpu_pmu, char *name,
>  
>  static int armv8_pmuv3_init(struct arm_pmu *cpu_pmu)
>  {
> -	return armv8_pmu_init_nogroups(cpu_pmu, "armv8_pmuv3",
> -				       armv8_pmuv3_map_event);
> +	return armv8_pmu_init_nogroups(cpu_pmu, "armv8_pmuv3", NULL);
>  }
>  
>  static int armv8_a34_pmu_init(struct arm_pmu *cpu_pmu)
>  {
> -	return armv8_pmu_init_nogroups(cpu_pmu, "armv8_cortex_a34",
> -				       armv8_pmuv3_map_event);
> +	return armv8_pmu_init_nogroups(cpu_pmu, "armv8_cortex_a34", NULL);
>  }
>  
>  static int armv8_a35_pmu_init(struct arm_pmu *cpu_pmu)
> @@ -1171,8 +1169,7 @@ static int armv8_a53_pmu_init(struct arm_pmu *cpu_pmu)
>  
>  static int armv8_a55_pmu_init(struct arm_pmu *cpu_pmu)
>  {
> -	return armv8_pmu_init_nogroups(cpu_pmu, "armv8_cortex_a55",
> -				       armv8_pmuv3_map_event);
> +	return armv8_pmu_init_nogroups(cpu_pmu, "armv8_cortex_a55", NULL);
>  }
>  
>  static int armv8_a57_pmu_init(struct arm_pmu *cpu_pmu)
> @@ -1183,8 +1180,7 @@ static int armv8_a57_pmu_init(struct arm_pmu *cpu_pmu)
>  
>  static int armv8_a65_pmu_init(struct arm_pmu *cpu_pmu)
>  {
> -	return armv8_pmu_init_nogroups(cpu_pmu, "armv8_cortex_a65",
> -				       armv8_pmuv3_map_event);
> +	return armv8_pmu_init_nogroups(cpu_pmu, "armv8_cortex_a65", NULL);
>  }
>  
>  static int armv8_a72_pmu_init(struct arm_pmu *cpu_pmu)
> @@ -1201,38 +1197,32 @@ static int armv8_a73_pmu_init(struct arm_pmu *cpu_pmu)
>  
>  static int armv8_a75_pmu_init(struct arm_pmu *cpu_pmu)
>  {
> -	return armv8_pmu_init_nogroups(cpu_pmu, "armv8_cortex_a75",
> -				       armv8_pmuv3_map_event);
> +	return armv8_pmu_init_nogroups(cpu_pmu, "armv8_cortex_a75", NULL);
>  }
>  
>  static int armv8_a76_pmu_init(struct arm_pmu *cpu_pmu)
>  {
> -	return armv8_pmu_init_nogroups(cpu_pmu, "armv8_cortex_a76",
> -				       armv8_pmuv3_map_event);
> +	return armv8_pmu_init_nogroups(cpu_pmu, "armv8_cortex_a76", NULL);
>  }
>  
>  static int armv8_a77_pmu_init(struct arm_pmu *cpu_pmu)
>  {
> -	return armv8_pmu_init_nogroups(cpu_pmu, "armv8_cortex_a77",
> -				       armv8_pmuv3_map_event);
> +	return armv8_pmu_init_nogroups(cpu_pmu, "armv8_cortex_a77", NULL);
>  }
>  
>  static int armv8_a78_pmu_init(struct arm_pmu *cpu_pmu)
>  {
> -	return armv8_pmu_init_nogroups(cpu_pmu, "armv8_cortex_a78",
> -				       armv8_pmuv3_map_event);
> +	return armv8_pmu_init_nogroups(cpu_pmu, "armv8_cortex_a78", NULL);
>  }
>  
>  static int armv8_e1_pmu_init(struct arm_pmu *cpu_pmu)
>  {
> -	return armv8_pmu_init_nogroups(cpu_pmu, "armv8_neoverse_e1",
> -				       armv8_pmuv3_map_event);
> +	return armv8_pmu_init_nogroups(cpu_pmu, "armv8_neoverse_e1", NULL);
>  }
>  
>  static int armv8_n1_pmu_init(struct arm_pmu *cpu_pmu)
>  {
> -	return armv8_pmu_init_nogroups(cpu_pmu, "armv8_neoverse_n1",
> -				       armv8_pmuv3_map_event);
> +	return armv8_pmu_init_nogroups(cpu_pmu, "armv8_neoverse_n1", NULL);
>  }
>  
>  static int armv8_thunder_pmu_init(struct arm_pmu *cpu_pmu)
> -- 
> 2.28.0.dirty
> 

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  reply	other threads:[~2021-12-14 13:39 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-12-07 18:20 [PATCH 0/5] arm64: DT binding/PMU updates Robin Murphy
2021-12-07 18:20 ` [PATCH 1/5] dt-bindings: arm: Catch up with Cortex/Neoverse CPUs again Robin Murphy
2021-12-08 18:12   ` Rob Herring
2021-12-07 18:20 ` [PATCH 2/5] arm64: perf: Simplify registration boilerplate Robin Murphy
2021-12-14 13:38   ` Mark Rutland [this message]
2021-12-07 18:20 ` [PATCH 3/5] arm64: perf: Support new DT compatibles Robin Murphy
2021-12-07 18:44   ` Mark Rutland
2021-12-07 19:14     ` Robin Murphy
2021-12-14 13:36       ` Mark Rutland
2021-12-07 18:20 ` [PATCH 4/5] dt-bindings: perf: Convert Arm DSU to schema Robin Murphy
2021-12-08 13:44   ` Rob Herring
2021-12-08 18:16   ` Rob Herring
2021-12-07 18:20 ` [PATCH 5/5] dt-bindings: perf: Add compatible for Arm DSU-110 Robin Murphy
2021-12-08 18:21   ` Rob Herring
2021-12-08 21:01     ` Robin Murphy

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