[PATCH 0/2] dt-bindings: spi: atmel,quadspi: Define sama7g5 QSPI

[PATCH 0/2] dt-bindings: spi: atmel,quadspi: Define sama7g5 QSPI

[Tudor Ambarus]

Convert the Atmel QuadSPI controller Device Tree binding documentation
to json-schema. Define sama7g5 QSPI.

After the conversion to yaml, make dtbs_check reavealed a problem
that was fixed with:
https://lore.kernel.org/lkml/20211209102542.254153-1-tudor.ambarus@microchip.com/

Tudor Ambarus (2):
  dt-bindings: spi: atmel,quadspi: Convert to json-schema
  dt-bindings: spi: atmel,quadspi: Define sama7g5 QSPI

 .../bindings/spi/atmel,quadspi.yaml           | 99 +++++++++++++++++++
 .../devicetree/bindings/spi/atmel-quadspi.txt | 37 -------
 2 files changed, 99 insertions(+), 37 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/spi/atmel,quadspi.yaml
 delete mode 100644 Documentation/devicetree/bindings/spi/atmel-quadspi.txt

-- 
2.25.1


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[PATCH 1/2] dt-bindings: spi: atmel,quadspi: Convert to json-schema

[Tudor Ambarus]

Convert the Atmel QuadSPI controller Device Tree binding documentation
to json-schema.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
---
 .../bindings/spi/atmel,quadspi.yaml           | 87 +++++++++++++++++++
 .../devicetree/bindings/spi/atmel-quadspi.txt | 37 --------
 2 files changed, 87 insertions(+), 37 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/spi/atmel,quadspi.yaml
 delete mode 100644 Documentation/devicetree/bindings/spi/atmel-quadspi.txt

diff --git a/Documentation/devicetree/bindings/spi/atmel,quadspi.yaml b/Documentation/devicetree/bindings/spi/atmel,quadspi.yaml
new file mode 100644
index 000000000000..7d0408f53c5f
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/atmel,quadspi.yaml
@@ -0,0 +1,87 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/spi/atmel,quadspi.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Atmel Quad Serial Peripheral Interface (QSPI)
+
+maintainers:
+  - Tudor Ambarus <tudor.ambarus@microchip.com>
+
+allOf:
+  - $ref: spi-controller.yaml#
+
+properties:
+  compatible:
+    enum:
+      - atmel,sama5d2-qspi
+      - microchip,sam9x60-qspi
+
+  reg:
+    items:
+      - description: base registers
+      - description: mapped memory
+
+  reg-names:
+    items:
+      - const: qspi_base
+      - const: qspi_mmap
+
+  clocks:
+    minItems: 1
+    items:
+      - description: peripheral clock
+      - description: system clock, if available
+
+  clock-names:
+    minItems: 1
+    items:
+      - const: pclk
+      - const: qspick
+
+  interrupts:
+    maxItems: 1
+
+  '#address-cells':
+    const: 1
+
+  '#size-cells':
+    const: 0
+
+required:
+  - compatible
+  - reg
+  - reg-names
+  - interrupts
+  - clocks
+  - clock-names
+  - '#address-cells'
+  - '#size-cells'
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/irq.h>
+    #include <dt-bindings/clock/at91.h>
+    spi@f0020000 {
+        compatible = "atmel,sama5d2-qspi";
+        reg = <0xf0020000 0x100>, <0xd0000000 0x8000000>;
+        reg-names = "qspi_base", "qspi_mmap";
+        interrupts = <52 IRQ_TYPE_LEVEL_HIGH 7>;
+        clocks = <&pmc PMC_TYPE_PERIPHERAL 52>;
+        clock-names = "pclk";
+        #address-cells = <1>;
+        #size-cells = <0>;
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_spi0_default>;
+
+        flash@0 {
+            compatible = "jedec,spi-nor";
+            spi-max-frequency = <50000000>;
+            reg = <0>;
+            spi-rx-bus-width = <4>;
+            spi-tx-bus-width = <4>;
+        };
+    };
diff --git a/Documentation/devicetree/bindings/spi/atmel-quadspi.txt b/Documentation/devicetree/bindings/spi/atmel-quadspi.txt
deleted file mode 100644
index 7c40ea694352..000000000000
--- a/Documentation/devicetree/bindings/spi/atmel-quadspi.txt
+++ /dev/null
@@ -1,37 +0,0 @@
-* Atmel Quad Serial Peripheral Interface (QSPI)
-
-Required properties:
-- compatible:     Should be one of the following:
-		  - "atmel,sama5d2-qspi"
-		  - "microchip,sam9x60-qspi"
-- reg:            Should contain the locations and lengths of the base registers
-                  and the mapped memory.
-- reg-names:      Should contain the resource reg names:
-                  - qspi_base: configuration register address space
-                  - qspi_mmap: memory mapped address space
-- interrupts:     Should contain the interrupt for the device.
-- clocks:         Should reference the peripheral clock and the QSPI system
-                  clock if available.
-- clock-names:    Should contain "pclk" for the peripheral clock and "qspick"
-                  for the system clock when available.
-- #address-cells: Should be <1>.
-- #size-cells:    Should be <0>.
-
-Example:
-
-spi@f0020000 {
-	compatible = "atmel,sama5d2-qspi";
-	reg = <0xf0020000 0x100>, <0xd0000000 0x8000000>;
-	reg-names = "qspi_base", "qspi_mmap";
-	interrupts = <52 IRQ_TYPE_LEVEL_HIGH 7>;
-	clocks = <&pmc PMC_TYPE_PERIPHERAL 52>;
-	clock-names = "pclk";
-	#address-cells = <1>;
-	#size-cells = <0>;
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_spi0_default>;
-
-	m25p80@0 {
-		...
-	};
-};
-- 
2.25.1


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Re: [PATCH 1/2] dt-bindings: spi: atmel, quadspi: Convert to json-schema

[Rob Herring]

On Thu, 09 Dec 2021 14:29:38 +0200, Tudor Ambarus wrote:
> Convert the Atmel QuadSPI controller Device Tree binding documentation
> to json-schema.
> 
> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
> ---
>  .../bindings/spi/atmel,quadspi.yaml           | 87 +++++++++++++++++++
>  .../devicetree/bindings/spi/atmel-quadspi.txt | 37 --------
>  2 files changed, 87 insertions(+), 37 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/spi/atmel,quadspi.yaml
>  delete mode 100644 Documentation/devicetree/bindings/spi/atmel-quadspi.txt
> 

Running 'make dtbs_check' with the schema in this patch gives the
following warnings. Consider if they are expected or the schema is
incorrect. These may not be new warnings.

Note that it is not yet a requirement to have 0 warnings for dtbs_check.
This will change in the future.

Full log is available here: https://patchwork.ozlabs.org/patch/1565734


spi@f0024000: 'clock-names' is a required property
	arch/arm/boot/dts/at91-sama5d27_som1_ek.dt.yaml
	arch/arm/boot/dts/at91-sama5d27_wlsom1_ek.dt.yaml


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Re: [PATCH 1/2] dt-bindings: spi: atmel,quadspi: Convert to json-schema

[Tudor.Ambarus]

Hi, Rob,

On 12/9/21 7:10 PM, Rob Herring wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> On Thu, 09 Dec 2021 14:29:38 +0200, Tudor Ambarus wrote:
>> Convert the Atmel QuadSPI controller Device Tree binding documentation
>> to json-schema.
>>
>> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
>> ---
>>  .../bindings/spi/atmel,quadspi.yaml           | 87 +++++++++++++++++++
>>  .../devicetree/bindings/spi/atmel-quadspi.txt | 37 --------
>>  2 files changed, 87 insertions(+), 37 deletions(-)
>>  create mode 100644 Documentation/devicetree/bindings/spi/atmel,quadspi.yaml
>>  delete mode 100644 Documentation/devicetree/bindings/spi/atmel-quadspi.txt
>>
> 
> Running 'make dtbs_check' with the schema in this patch gives the
> following warnings. Consider if they are expected or the schema is
> incorrect. These may not be new warnings.
> 
> Note that it is not yet a requirement to have 0 warnings for dtbs_check.
> This will change in the future.
> 
> Full log is available here: https://patchwork.ozlabs.org/patch/1565734
> 
> 
> spi@f0024000: 'clock-names' is a required property
>         arch/arm/boot/dts/at91-sama5d27_som1_ek.dt.yaml
>         arch/arm/boot/dts/at91-sama5d27_wlsom1_ek.dt.yaml
> 

Thanks, I was aware of that. I specified in the cover letter that these are
fixed with the following patch:
https://lore.kernel.org/lkml/20211209102542.254153-1-tudor.ambarus@microchip.com/

Cheers,
ta
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Re: [PATCH 1/2] dt-bindings: spi: atmel,quadspi: Convert to json-schema

[Rob Herring]

On Thu, 09 Dec 2021 14:29:38 +0200, Tudor Ambarus wrote:
> Convert the Atmel QuadSPI controller Device Tree binding documentation
> to json-schema.
> 
> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
> ---
>  .../bindings/spi/atmel,quadspi.yaml           | 87 +++++++++++++++++++
>  .../devicetree/bindings/spi/atmel-quadspi.txt | 37 --------
>  2 files changed, 87 insertions(+), 37 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/spi/atmel,quadspi.yaml
>  delete mode 100644 Documentation/devicetree/bindings/spi/atmel-quadspi.txt
> 

Reviewed-by: Rob Herring <robh@kernel.org>

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[PATCH 2/2] dt-bindings: spi: atmel,quadspi: Define sama7g5 QSPI

[Tudor Ambarus]

sama7g5 embedds 2 instances of the QSPI controller:
1/ One Octal Serial Peripheral Interface (QSPI0) Supporting up to
   200 MHz DDR. Octal, TwinQuad, HyperFlash and OctaFlash Protocols
   Supported
2/ One Quad Serial Peripheral Interface (QSPI1) Supporting Up to
   90 MHz DDR/133 MHz SDR

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
---
 .../devicetree/bindings/spi/atmel,quadspi.yaml   | 16 ++++++++++++++--
 1 file changed, 14 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/spi/atmel,quadspi.yaml b/Documentation/devicetree/bindings/spi/atmel,quadspi.yaml
index 7d0408f53c5f..1d493add4053 100644
--- a/Documentation/devicetree/bindings/spi/atmel,quadspi.yaml
+++ b/Documentation/devicetree/bindings/spi/atmel,quadspi.yaml
@@ -17,6 +17,8 @@ properties:
     enum:
       - atmel,sama5d2-qspi
       - microchip,sam9x60-qspi
+      - microchip,sama7g5-qspi
+      - microchip,sama7g5-ospi
 
   reg:
     items:
@@ -32,17 +34,27 @@ properties:
     minItems: 1
     items:
       - description: peripheral clock
-      - description: system clock, if available
+      - description: system clock or generic clock, if available
 
   clock-names:
     minItems: 1
     items:
       - const: pclk
-      - const: qspick
+      - enum: [ qspick, gclk ]
 
   interrupts:
     maxItems: 1
 
+  dmas:
+    items:
+      - description: tx DMA channel
+      - description: rx DMA channel
+
+  dma-names:
+    items:
+      - const: tx
+      - const: rx
+
   '#address-cells':
     const: 1
 
-- 
2.25.1


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Re: [PATCH 2/2] dt-bindings: spi: atmel,quadspi: Define sama7g5 QSPI

[Rob Herring]

On Thu, 09 Dec 2021 14:29:39 +0200, Tudor Ambarus wrote:
> sama7g5 embedds 2 instances of the QSPI controller:
> 1/ One Octal Serial Peripheral Interface (QSPI0) Supporting up to
>    200 MHz DDR. Octal, TwinQuad, HyperFlash and OctaFlash Protocols
>    Supported
> 2/ One Quad Serial Peripheral Interface (QSPI1) Supporting Up to
>    90 MHz DDR/133 MHz SDR
> 
> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
> ---
>  .../devicetree/bindings/spi/atmel,quadspi.yaml   | 16 ++++++++++++++--
>  1 file changed, 14 insertions(+), 2 deletions(-)
> 

Reviewed-by: Rob Herring <robh@kernel.org>

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Re: [PATCH 0/2] dt-bindings: spi: atmel,quadspi: Define sama7g5 QSPI

[Mark Brown]

On Thu, 9 Dec 2021 14:29:37 +0200, Tudor Ambarus wrote:
> Convert the Atmel QuadSPI controller Device Tree binding documentation
> to json-schema. Define sama7g5 QSPI.
> 
> After the conversion to yaml, make dtbs_check reavealed a problem
> that was fixed with:
> https://lore.kernel.org/lkml/20211209102542.254153-1-tudor.ambarus@microchip.com/
> 
> [...]

Applied to

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next

Thanks!

[1/2] dt-bindings: spi: atmel,quadspi: Convert to json-schema
      commit: 001a41d2a7061694fa31accdbc2013bb5c5d83b5
[2/2] dt-bindings: spi: atmel,quadspi: Define sama7g5 QSPI
      commit: 77850bda360dd9b389d5064c64b79467d613c3d6

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark

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