From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 86F1FC433EF for ; Wed, 19 Jan 2022 12:43:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=rI1xKG/Mu0QCbz7ChKjeND4LsIzCpaY5Mig8GHS1lTw=; b=uW9wHB0XTMwHJC AzT+Py2jTNvsjnKOvdYjVBncaQu52ezi5C67XeuJMWPepk+BP+bfd+bTigfrXv4gHAcC+Y3UrfNv4 emBA9tTZvccs5rLsYMkXCHBqMKKWqDVQLX7Az+CR7MT0mICxPvoGDLFa3WS7g3x6NXvtfsdn1OEF5 f3Ep+2rM1pEu9ip9Gy0AFKsatl9/jnNH1nKuyhwxOt/wAd6zzfWDU8i4+U/qKLuTilIQDtD2xbND8 EQQY66zZ6DjAiQosjGjb/Dko8MUUnd8ts2iYgBbE+1C5x2WkwJgJJN8i4lH9A6RzylfQq0fyJHVr7 Vm6Ms5tezUCpAxS5y4qQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nAAIU-005SA2-B9; Wed, 19 Jan 2022 12:42:42 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nAAIR-005S8n-Dz for linux-arm-kernel@lists.infradead.org; Wed, 19 Jan 2022 12:42:40 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 4B0ACED1; Wed, 19 Jan 2022 04:42:38 -0800 (PST) Received: from FVFF77S0Q05N (unknown [10.57.3.112]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 27B583F73D; Wed, 19 Jan 2022 04:42:37 -0800 (PST) Date: Wed, 19 Jan 2022 12:42:34 +0000 From: Mark Rutland To: Andre Przywara Cc: linux-arm-kernel@lists.infradead.org, Jaxson.Han@arm.com, robin.murphy@arm.com, vladimir.murzin@arm.com, Wei.Chen@arm.com Subject: Re: [bootwrapper PATCH v2 06/13] aarch64: initialize SCTLR_ELx for the boot-wrapper Message-ID: References: <20220114105653.3003399-1-mark.rutland@arm.com> <20220114105653.3003399-7-mark.rutland@arm.com> <20220114181247.7b366f45@donnerap.cambridge.arm.com> <20220117121557.GA87485@C02TD0UTHF1T.local> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20220117121557.GA87485@C02TD0UTHF1T.local> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220119_044239_565331_2798DBFA X-CRM114-Status: GOOD ( 18.04 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, Jan 17, 2022 at 12:15:57PM +0000, Mark Rutland wrote: > On Fri, Jan 14, 2022 at 06:12:47PM +0000, Andre Przywara wrote: > > On Fri, 14 Jan 2022 10:56:46 +0000 > > Mark Rutland wrote: > > > + > > > +#define SCTLR_EL1_RES1 (BIT(29) | BIT(28) | BIT(23) | BIT(22) | \ > > > + BIT(11) | BIT(8) | BIT(7) | BIT(4)) > > > > - The kernel sets TSCXT(bit[20]), and the ARM ARM says that the value > > should be RES1 if FEAT_CSV2_* is not implemented. Should we copy this? > > Yes, we should. I'll go and fold that in. > > > - The kernel clears ITD(bit[7]), and the ARM ARM says it's *Otherwise* RES1 > > (no AArch32 in EL0). I feel like we should not disable IT instructions in > > EL0 needlessly? > > Per the ARM ARM the bit resets to an UNKNOWN value, and so per our usual > policy the kernel must initialize that before it can depend upon it, and > IIUC you say the kernel already does so. > > So it shouldn't matter what the boot-wrapper does, and for consitency, I > think the boot-wrapper should set this to 0b1. > > > - I also feel like we should set CP15BEN(bit[5]), for similar reasons. > > I agree. I thought you meant it was also RES1 in the same case as ITD. It's actually RES0 when there's no AArch32 EL0 support, so I'm not going to add it to SCTLR_EL1_RES1. I have added TSCXT (bit[20]) and ITD (bit[7]), as above, as those are RES1 in some contexts. THanks, Mark. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel