From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EEE67C433F5 for ; Thu, 27 Jan 2022 16:10:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=CBd+CmKFLQO2sSok/AYZ1I1hVGyRqLDA0fRZYkTXrds=; b=TDIw6K7UNg4pYD B/eC8fm2jzAKi+l+baBaiTYxi7Yu0kPgi4+LFqG/BKNsvttLMDviDtz72cQKaVhuM+CGLrkLX4D6M yyIJLS/fN3IPgmv7V9pcIB85tUnf/4IrTW9Xk4Smt2uumzNFNewPJTwBWGmtd66PAYbbGKL5BM07h 3iVgAYNFqn2eTLPPcpkhKV0kjief3CVcKr6nGn0ttelOKUomND4dYyAoB0OjqnkRSR+aiHFtwcVgv hKfRpDxTljI5uBknoTEl5VnnE/qaUmTsZn88cHd7mN4Qsen0c35vF8241cIknGuG6POND7cIs6RCo nYh7vi1pNpPmMsYBkRRw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nD7Kg-00GOsx-34; Thu, 27 Jan 2022 16:09:10 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nD7Kb-00GOrU-Bw for linux-arm-kernel@lists.infradead.org; Thu, 27 Jan 2022 16:09:07 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 7017B1063; Thu, 27 Jan 2022 08:09:04 -0800 (PST) Received: from FVFF77S0Q05N (unknown [10.57.14.34]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 277A23F766; Thu, 27 Jan 2022 08:09:03 -0800 (PST) Date: Thu, 27 Jan 2022 16:08:50 +0000 From: Mark Rutland To: Mark Brown Cc: linux-arm-kernel@lists.infradead.org, andre.przywara@arm.com, jaxson.han@arm.com, robin.murphy@arm.com, vladimir.murzin@arm.com, wei.chen@arm.com Subject: Re: [bootwrapper PATCH v3 01/15] aarch64: correct ZCR_EL3.LEN initialization Message-ID: References: <20220125150057.3936090-1-mark.rutland@arm.com> <20220125150057.3936090-2-mark.rutland@arm.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220127_080905_569304_EC3C6D44 X-CRM114-Status: GOOD ( 41.80 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, Jan 25, 2022 at 05:44:47PM +0000, Mark Brown wrote: > On Tue, Jan 25, 2022 at 04:33:39PM +0000, Mark Rutland wrote: > > On Tue, Jan 25, 2022 at 03:59:38PM +0000, Mark Brown wrote: > > > On Tue, Jan 25, 2022 at 03:00:43PM +0000, Mark Rutland wrote: > > > > > As the same time, rename ZCR_EL3_LEN_MASK to ZCR_EL3_LEN_MAX, as it is > > > > used as a value rather than as a bit mask. > > > > Well, it's both and we do call it a mask in both the kernel and TF-A > > > too... > > > Here specifically in the boot-wrapper I'm just using it as a value, so I don't > > see that those are relevant? > > That's also a bunch of the other usage - the kernel uses it to set the > maximum available value by virtue of setting every possible bit in the > bitfield, though it does also use it as a mask in places. > > > The idea was to be consistent with the __ naming, > > and avoiding the "why are you programming a mask as the value" questions from > > last time around, where the unambiguous options are: > > I've not seen that - I did see that there had been some discussion as to > why the code had been including the reserved bits but hadn't seen any > discussion of confusion between mask and max. In: https://lore.kernel.org/all/20220117143104.28db5001@donnerap.cambridge.arm.com/#t w.r.t. the use of ZCR_EL3_LEN, Andre said: | So when comparing this to the other uses of XXX_EL3_YYY, they typically | describe a mask, but here we seems to abuse this as a value? ... which begat the rename. In this cleanup I've tried to use _ for masks, and __ for specific values to program in, and hence I added ZCR_EL3_LEN_MAX. I'm going to stick with ZCR_EL3_LEN_MAX. In that same paragraph he said: | the existing code writes 0x1ff into that register, presumable to cover future | vector length extensions ... which begat the conversation of which length to use. I later noted that TF-A currently uses 0xf, and so I aligned with that and plan to stick with it in the absence of any published architectural guidance that we *should* set the RAZ/WI bits. We can always add that in future when necessary if/when the field grows, and until then it's less surprising to only be setting the bits that are documented as needing to be set in this manner. > > a) Use __ definition, as here. > > > b) Use __MASK, and add comments at each usage as to why we use > > a mask as a value, to explain why that isn't a bug. > > > c) Have both __MASK and some value definition, and use some > > insertion helper to insert the value. > > > ... and I went with (a) because it was the simplest. > > > Is there a problem with this? > > My concern is continuity of the enumeration algorithm between the > various implementations we have, it's something we're not currently > great with and this creates a separation between the kernel and the boot > wrapper implementations. There's no change in what's actually being > done but it creates some additional effort to figure out why we're > setting a maximum here and not trying to set all the bits as we do in > the kernel. TBH, I'd argue if we're setting those bits in the kernel it's probably a bug, because we don't know *exactly* what effect they'll have when allocated in the future. Thanks, Mark. > TF-A is doing something else again (actually two different > things if you include SME which uses the same algorithm for the > streaming vector length), for SVE it uses a maximum length too but it > uses a lower length than the maximum representable one that's used here. > > It may be that the best thing to do is to make this change but also > update the kernel to have separate but identical mask and maximum > definitions, though TBH I'd rather not actually have that update happen > while the SME series is pending. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel