From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9B2C1C433EF for ; Tue, 15 Feb 2022 14:53:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=SWeohEO8lgpunJnjaU8J0ar0VKsRgggBw7xQfzxSfXk=; b=ETir+oiEO4NUXl dx2FloV9b+0NPkQqjV4R9G3LoWtR3jcLytvkI+uoH9kYOSrxWkIt4LOO+G9SxdTUl/n6lBXvyFXGq nY1E0+kwnXUkWqAzEeWEiELSDs2o8CbSrJNAqcclnghEPsMZZ1fqKrRYNugRvzQNmuVCOHgqixuvI /RhFYVONi6HI38Dm4Ev+xMnYq63DD7hja3iXe6+2CNB5vVE3a/gMj8cKzFSe7kb9IlKtCN8Lmcbzh K29VCilnTBiSkuoIyJEIOG05hbprW+9dSGXLcqZMUtISMw55KniuG5vpkq3C2TxyHkDYeEI4uC9r8 02Xex7tHPfYsl0jjhykw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nJzCC-0037cL-5u; Tue, 15 Feb 2022 14:52:48 +0000 Received: from casper.infradead.org ([2001:8b0:10b:1236::1]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nJzCA-0037bv-2y for linux-arm-kernel@bombadil.infradead.org; Tue, 15 Feb 2022 14:52:46 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=In-Reply-To:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=zQPfzaXYTen9B7ctEl9RbjjHcQxy0ST/oNZRagZvDgI=; b=DsSD6xOPuis4kVe7KaBZ6PDpOk r+e/WwTOsrCbe7Uvwx4Ho45zmZdW14dwTxST8MKHIXk8YDhMU/nVp4MX3+YO+CrNwLCt13svfUePm dh171CM+JniP3wzeTE+r3GOp0S/NyrKWQFaKBXPR7qhJLQhvJvfExp8Axr52E2g3zuJeE9BoNeLM0 xtNutF3cnBZMFcllmVcYW2PPwawwRLjyDO1X0ShnoDhrqe80sa1s4KZcsE9JkBzmL8wWRCSsYIoCV KrDeAwI7syb2xpoDB7NzvSOP1w0OPIihMgDAQZs3mMbagUAaEcIMhyF4YpKMjJz56rgCmes8LXHxv CNV85r1w==; Received: from [179.97.37.151] (helo=quaco.ghostprotocols.net) by casper.infradead.org with esmtpsa (Exim 4.94.2 #2 (Red Hat Linux)) id 1nJzC8-00DvVg-I8 for linux-arm-kernel@lists.infradead.org; Tue, 15 Feb 2022 14:52:44 +0000 Received: by quaco.ghostprotocols.net (Postfix, from userid 1000) id C3089400FE; Tue, 15 Feb 2022 11:52:40 -0300 (-03) Date: Tue, 15 Feb 2022 11:52:40 -0300 From: Arnaldo Carvalho de Melo To: Suzuki K Poulose Cc: James Clark , mathieu.poirier@linaro.org, coresight@lists.linaro.org, leo.yan@linaro.com, mike.leach@linaro.org, Leo Yan , John Garry , Will Deacon , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org Subject: Re: [PATCH v2 3/6] perf cs-etm: Update deduction of TRCCONFIGR register for branch broadcast Message-ID: References: <20220113091056.1297982-1-james.clark@arm.com> <20220113091056.1297982-4-james.clark@arm.com> <25b85560-dd95-2569-d1bc-872902d6343f@arm.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <25b85560-dd95-2569-d1bc-872902d6343f@arm.com> X-Url: http://acmel.wordpress.com X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Em Fri, Jan 28, 2022 at 11:25:24AM +0000, Suzuki K Poulose escreveu: > On 13/01/2022 09:10, James Clark wrote: > > Now that a config flag for branch broadcast has been added, take it into > > account when trying to deduce what the driver would have programmed the > > TRCCONFIGR register to. Thanks, applied this one, the tools/ part. - Arnaldo > > Reviewed-by: Leo Yan > > Signed-off-by: James Clark > > --- > > tools/include/linux/coresight-pmu.h | 2 ++ > > tools/perf/arch/arm/util/cs-etm.c | 3 +++ > > 2 files changed, 5 insertions(+) > > > > diff --git a/tools/include/linux/coresight-pmu.h b/tools/include/linux/coresight-pmu.h > > index 4ac5c081af93..6c2fd6cc5a98 100644 > > --- a/tools/include/linux/coresight-pmu.h > > +++ b/tools/include/linux/coresight-pmu.h > > @@ -18,6 +18,7 @@ > > * ETMv3.5/PTM doesn't define ETMCR config bits with prefix "ETM3_" and > > * directly use below macros as config bits. > > */ > > +#define ETM_OPT_BRANCH_BROADCAST 8 > > #define ETM_OPT_CYCACC 12 > > #define ETM_OPT_CTXTID 14 > > #define ETM_OPT_CTXTID2 15 > > @@ -25,6 +26,7 @@ > > #define ETM_OPT_RETSTK 29 > > /* ETMv4 CONFIGR programming bits for the ETM OPTs */ > > +#define ETM4_CFG_BIT_BB 3 > > #define ETM4_CFG_BIT_CYCACC 4 > > #define ETM4_CFG_BIT_CTXTID 6 > > #define ETM4_CFG_BIT_VMID 7 > > diff --git a/tools/perf/arch/arm/util/cs-etm.c b/tools/perf/arch/arm/util/cs-etm.c > > index 293a23bf8be3..c7ef4e9b4a3a 100644 > > --- a/tools/perf/arch/arm/util/cs-etm.c > > +++ b/tools/perf/arch/arm/util/cs-etm.c > > @@ -527,6 +527,9 @@ static u64 cs_etmv4_get_config(struct auxtrace_record *itr) > > if (config_opts & BIT(ETM_OPT_CTXTID2)) > > config |= BIT(ETM4_CFG_BIT_VMID) | > > BIT(ETM4_CFG_BIT_VMID_OPT); > > + if (config_opts & BIT(ETM_OPT_BRANCH_BROADCAST)) > > + config |= BIT(ETM4_CFG_BIT_BB); > > + > > return config; > > Reviewed-by: Suzuki K Poulose > > > } -- - Arnaldo _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel