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[34.68.225.194]) by smtp.gmail.com with ESMTPSA id k9sm6734677ilv.31.2022.02.15.10.53.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Feb 2022 10:53:56 -0800 (PST) Date: Tue, 15 Feb 2022 18:53:53 +0000 From: Oliver Upton To: Reiji Watanabe Cc: Marc Zyngier , kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, James Morse , Alexandru Elisei , Suzuki K Poulose , Paolo Bonzini , Will Deacon , Andrew Jones , Fuad Tabba , Peng Liang , Peter Shier , Ricardo Koller , Jing Zhang , Raghavendra Rao Anata Subject: Re: [PATCH v5 09/27] KVM: arm64: Make ID_AA64MMFR1_EL1 writable Message-ID: References: <20220214065746.1230608-1-reijiw@google.com> <20220214065746.1230608-10-reijiw@google.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20220214065746.1230608-10-reijiw@google.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220215_105402_136282_F927E2CA X-CRM114-Status: GOOD ( 25.00 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Reiji, On Sun, Feb 13, 2022 at 10:57:28PM -0800, Reiji Watanabe wrote: > This patch adds id_reg_info for ID_AA64MMFR1_EL1 to make it > writable by userspace. > > Hardware update of Access flag and/or Dirty state in translation > table needs to be disabled for the guest to let userspace set > ID_AA64MMFR1_EL1.HAFDBS field to a lower value. It requires trapping > the guest's accessing TCR_EL1, which KVM doesn't always do (in order > to trap it without FEAT_FGT, HCR_EL2.TVM needs to be set to 1, which > also traps many other virtual memory control registers). > So, userspace won't be allowed to modify the value of the HAFDBS field. > > Signed-off-by: Reiji Watanabe > --- > arch/arm64/kvm/sys_regs.c | 30 ++++++++++++++++++++++++++++++ > 1 file changed, 30 insertions(+) > > diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c > index 4ed15ae7f160..1c137f8c236f 100644 > --- a/arch/arm64/kvm/sys_regs.c > +++ b/arch/arm64/kvm/sys_regs.c > @@ -570,6 +570,30 @@ static int validate_id_aa64mmfr0_el1(struct kvm_vcpu *vcpu, > return 0; > } > > +static int validate_id_aa64mmfr1_el1(struct kvm_vcpu *vcpu, > + const struct id_reg_info *id_reg, u64 val) > +{ > + u64 limit = id_reg->vcpu_limit_val; > + unsigned int hafdbs, lim_hafdbs; > + > + hafdbs = cpuid_feature_extract_unsigned_field(val, ID_AA64MMFR1_HADBS_SHIFT); > + lim_hafdbs = cpuid_feature_extract_unsigned_field(limit, ID_AA64MMFR1_HADBS_SHIFT); > + > + /* > + * Don't allow userspace to modify the value of HAFDBS. > + * Hardware update of Access flag and/or Dirty state in translation > + * table needs to be disabled for the guest to let userspace set > + * HAFDBS field to a lower value. It requires trapping the guest's > + * accessing TCR_EL1, which KVM doesn't always do (in order to trap > + * it without FEAT_FGT, HCR_EL2.TVM needs to be set to 1, which also > + * traps many other virtual memory control registers). > + */ > + if (hafdbs != lim_hafdbs) > + return -EINVAL; Are we going to require that any hidden feature be trappable going forward? It doesn't seem to me like there's much risk to userspace hiding any arbitrary feature so long as identity remains architectural. Another example of this is AArch32 at EL0. Without FGT, there is no precise trap for KVM to intervene and prevent an AArch32 EL0. Nonetheless, userspace might still want to hide this from its guests even if a misbehaved guest could still use it. -- Thanks, Oliver _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel